clk: renesas: Synchronize R-Car R8A77951 H3 clock tables with Linux 6.9.3

Synchronize R-Car R8A77951 H3 clock tables with Linux 6.9.3,
commit 1b4861e32e461b6fae14dc49ed0f1c7f20af5146 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>

diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index e511f74982b68b1fe30b80837777a5300fe7e7f5..4225036a1a9435c9f9dab61008f84c88bb91a913 100644 (file)
--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -77,6 +77,7 @@ static struct cpg_core_clk r8a7795_core_clks[] __initdata = {
        /* Core Clock Outputs */
        DEF_GEN3_Z("z",         R8A7795_CLK_Z,     CLK_TYPE_GEN3_Z,  CLK_PLL0, 2, 8),
        DEF_GEN3_Z("z2",        R8A7795_CLK_Z2,    CLK_TYPE_GEN3_Z,  CLK_PLL2, 2, 0),
+       DEF_GEN3_Z("zg",        R8A7795_CLK_ZG,    CLK_TYPE_GEN3_ZG, CLK_PLL4, 4, 24),
        DEF_FIXED("ztr",        R8A7795_CLK_ZTR,   CLK_PLL1_DIV2,  6, 1),
        DEF_FIXED("ztrd2",      R8A7795_CLK_ZTRD2, CLK_PLL1_DIV2, 12, 1),
        DEF_FIXED("zt",         R8A7795_CLK_ZT,    CLK_PLL1_DIV2,  4, 1),
@@ -126,6 +127,7 @@ static struct cpg_core_clk r8a7795_core_clks[] __initdata = {
 };
 
 static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
+       DEF_MOD("3dge",                  112,   R8A7795_CLK_ZG),
        DEF_MOD("fdp1-1",                118,   R8A7795_CLK_S0D1),
        DEF_MOD("fdp1-0",                119,   R8A7795_CLK_S0D1),
        DEF_MOD("tmu4",                  121,   R8A7795_CLK_S0D6),
@@ -249,6 +251,7 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
        DEF_MOD("rpc-if",                917,   R8A7795_CLK_RPCD2),
        DEF_MOD("i2c6",                  918,   R8A7795_CLK_S0D6),
        DEF_MOD("i2c5",                  919,   R8A7795_CLK_S0D6),
+       DEF_MOD("adg",                   922,   R8A7795_CLK_S0D4),
        DEF_MOD("i2c-dvfs",              926,   R8A7795_CLK_CP),
        DEF_MOD("i2c4",                  927,   R8A7795_CLK_S0D6),
        DEF_MOD("i2c3",                  928,   R8A7795_CLK_S0D6),