ls102xa: etsec: Use proper settings for BE BDs

Replace the DMACTRL[LE] hack with recommended settings
for ETSECDMAMCR to get the same end effect - obtaining
big-endian buffer descriptors and frame data for eTSEC.
The reset / default value for ETSECDMAMCR is preserved,
excepting the BD and FR bits which are cleared to enable
the BE mode in accordance with the H/W specifications.

Fixes: 52d00a8 "ls102xa: etsec: Add etsec support for LS102xA"
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Acked-by: Alison Wang <alison.wang@freescale.com>
Tested-by: Alison Wang <alison.wang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
index d34044a5f7c0044426e26ba799c500e15505bec1..60aa0d3b6f43bdf5db72c975ad5268c83de033ff 100644 (file)
--- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
+++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
@@ -143,7 +143,7 @@ struct ccsr_gur {
        u32     sdhcpcr;
 };
 
-#define SCFG_ETSECDMAMCR_LE_BD_FR      0xf8001a0f
+#define SCFG_ETSECDMAMCR_LE_BD_FR      0x00000c00
 #define SCFG_ETSECCMCR_GE2_CLK125      0x04000000
 #define SCFG_ETSECCMCR_GE0_CLK125      0x00000000
 #define SCFG_ETSECCMCR_GE1_CLK125      0x08000000

diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index d6ef6ba10d635e289d92280d90d5519ad1a97dff..e5853804877678e5efb86a1a877e4f3d04fe934e 100644 (file)
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -280,7 +280,8 @@ int board_early_init_f(void)
        unsigned int major;
 
 #ifdef CONFIG_TSEC_ENET
-       out_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);
+       /* clear BD & FR bits for BE BD's and frame data */
+       clrbits_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);
 #endif
 
 #ifdef CONFIG_FSL_IFC

diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c
index b7458a9e9950902c93ff16f0d80daa244f04baf8..006700f420f7691e0223441e8c0d489b15b94344 100644 (file)
--- a/board/freescale/ls1021atwr/ls1021atwr.c
+++ b/board/freescale/ls1021atwr/ls1021atwr.c
@@ -481,7 +481,8 @@ int board_early_init_f(void)
        unsigned int major;
 
 #ifdef CONFIG_TSEC_ENET
-       out_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);
+       /* clear BD & FR bits for BE BD's and frame data */
+       clrbits_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR);
        out_be32(&scfg->etsecmcr, SCFG_ETSECCMCR_GE2_CLK125);
 #endif
 

diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 42d037471fecc26aedbca473ad53343f974aa2d9..4bdc188c8f395551ddce7db00c6031fdc66acae1 100644 (file)
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -271,9 +271,6 @@ void redundant_init(struct eth_device *dev)
        out_be32(&regs->tstat, TSTAT_CLEAR_THALT);
        out_be32(&regs->rstat, RSTAT_CLEAR_RHALT);
        clrbits_be32(&regs->dmactrl, DMACTRL_GRS | DMACTRL_GTS);
-#ifdef CONFIG_LS102XA
-       setbits_be32(&regs->dmactrl, DMACTRL_LE);
-#endif
 
        do {
                uint16_t status;
@@ -370,9 +367,6 @@ static void startup_tsec(struct eth_device *dev)
        out_be32(&regs->tstat, TSTAT_CLEAR_THALT);
        out_be32(&regs->rstat, RSTAT_CLEAR_RHALT);
        clrbits_be32(&regs->dmactrl, DMACTRL_GRS | DMACTRL_GTS);
-#ifdef CONFIG_LS102XA
-       setbits_be32(&regs->dmactrl, DMACTRL_LE);
-#endif
 }
 
 /* This returns the status bits of the device. The return value