arm64: dts: rockchip: add SPI flash on NanoPC-T6

FriendlyELEC NanoPC-T6 has optional SPI flash chip on-board.
It is populated with 32MB one on LTS version.

Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-5-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: a22a629c63b1addcf2d81eaf30383c1deca5b7a9 ]

(cherry picked from commit 7588da65fdf09c7de9f903780c212a8ae96f2866)
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/dts/upstream/src/arm64/rockchip/rk3588-nanopc-t6.dtsi b/dts/upstream/src/arm64/rockchip/rk3588-nanopc-t6.dtsi
index d199f51a220ca3c767d512015df615eb53959629..77580c671b36b448df0078a1bdf1a243be63688a 100644 (file)
--- a/dts/upstream/src/arm64/rockchip/rk3588-nanopc-t6.dtsi
+++ b/dts/upstream/src/arm64/rockchip/rk3588-nanopc-t6.dtsi
@@ -560,6 +560,21 @@
        status = "okay";
 };
 
+/* optional on non-LTS, populated on LTS version */
+&sfc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&fspim1_pins>;
+       status = "okay";
+
+       flash@0 {
+               compatible = "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <104000000>;
+               spi-rx-bus-width = <4>;
+               spi-tx-bus-width = <1>;
+       };
+};
+
 &spi2 {
        status = "okay";
        assigned-clocks = <&cru CLK_SPI2>;