This requires the RTC clocks, etc, to be enabled prior to use and
not all boards with this IP block on it will have the RTC in use.
+config BOOTCOUNT_AM33XX_NVMEM
+ bool "Boot counter in AM33XX RTC IP block with upgrade_available flag"
+ depends on AM33XX
+ select SPL_AM33XX_ENABLE_RTC32K_OSC if AM33XX
+ help
+ Add support for maintaining bootcount,upgrade_available,
+ version and BOOTMAGIC in a AM33xx RTC IP block
+ scratch register2.
+
+ A bootcount driver for the RTC IP block found on many TI platforms.
+ This requires the RTC clocks, etc, to be enabled prior to use and
+ not all boards with this IP block on it will have the RTC in use.
+
+ If there is upgrade in software then "upgrade_available" is 1,
+ "bootcount" is incremented otherwise "upgrade_available" and
+ "bootcount" is always 0. So the Userspace Application must set
+ the "upgrade_available" and "bootcount" variable to 0, if a boot
+ was successfully.
+
config BOOTCOUNT_ENV
bool "Boot counter in environment"
help
config SYS_BOOTCOUNT_ADDR
hex "RAM address used for reading and writing the boot counter"
- default 0x44E3E000 if BOOTCOUNT_AM33XX
+ default 0x44E3E000 if BOOTCOUNT_AM33XX || BOOTCOUNT_AM33XX_NVMEM
default 0xE0115FF8 if ARCH_LS1043A || ARCH_LS1021A
depends on BOOTCOUNT_AM33XX || BOOTCOUNT_GENERIC || BOOTCOUNT_EXT || \
- BOOTCOUNT_I2C
+ BOOTCOUNT_I2C || BOOTCOUNT_AM33XX_NVMEM
help
Set the address used for reading and writing the boot counter.
config SYS_BOOTCOUNT_MAGIC
hex "Magic value for the boot counter"
- default 0xB001C041
+ default 0xB001C041 if BOOTCOUNT_GENERIC || BOOTCOUNT_EXT || \
+ BOOTCOUNT_AM33XX || BOOTCOUNT_ENV || \
+ BOOTCOUNT_RAM || BOOTCOUNT_I2C || \
+ BOOTCOUNT_AT91 || DM_BOOTCOUNT
+ default 0xB0 if BOOTCOUNT_AM33XX_NVMEM
+ depends on BOOTCOUNT_GENERIC || BOOTCOUNT_EXT || \
+ BOOTCOUNT_AM33XX || BOOTCOUNT_ENV || \
+ BOOTCOUNT_RAM || BOOTCOUNT_I2C || \
+ BOOTCOUNT_AT91 || DM_BOOTCOUNT || \
+ BOOTCOUNT_AM33XX_NVMEM
help
Set the magic value used for the boot counter.
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2011
+ * Heiko Schocher, DENX Software Engineering, hs@denx.de.
+ * (C) Copyright 2018 Robert Bosch Power Tools GmbH.
+ *
+ * A bootcount driver for the RTC IP block found on many TI platforms.
+ * This requires the RTC clocks, etc, to be enabled prior to use and
+ * not all boards with this IP block on it will have the RTC in use.
+ */
+
+#include <bootcount.h>
+#include <asm/davinci_rtc.h>
+
+#define BC_VERSION 2
+
+void bootcount_store(ulong bootcount)
+{
+ u8 upgrade_available = 0;
+ ulong val = 0;
+ struct davinci_rtc *reg =
+ (struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR;
+
+ val = raw_bootcount_load(®->scratch2);
+ upgrade_available = (val >> 8) & 0x000000ff;
+
+ /* Only update bootcount during upgrade process */
+ if (!upgrade_available)
+ bootcount = 0;
+
+ val = (bootcount & 0x000000ff) |
+ (upgrade_available << 8) |
+ (BC_VERSION << 16) |
+ (CONFIG_SYS_BOOTCOUNT_MAGIC << 24);
+
+ /*
+ * write RTC kick registers to enable write
+ * for RTC Scratch registers. Scratch register 2 is
+ * used for bootcount value.
+ */
+ writel(RTC_KICK0R_WE, ®->kick0r);
+ writel(RTC_KICK1R_WE, ®->kick1r);
+ raw_bootcount_store(®->scratch2, val);
+}
+
+ulong bootcount_load(void)
+{
+ unsigned long val = 0;
+ struct davinci_rtc *reg =
+ (struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR;
+
+ val = raw_bootcount_load(®->scratch2);
+ if ((val >> 24) != CONFIG_SYS_BOOTCOUNT_MAGIC)
+ return 0;
+ else
+ return val & 0x000000ff;
+}