M: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
M: Utsav Agarwal <utsav.agarwal@analog.com>
M: Arturs Artamonovs <arturs.artamonovs@analog.com>
+L: adsp-linux@analog.com
S: Supported
T: git https://github.com/analogdevicesinc/lnxdsp-u-boot
+F: arch/arm/dts/sc5*
F: arch/arm/include/asm/arch-adi/
F: arch/arm/mach-sc5xx/
F: drivers/clk/adi/
imx8mm-cl-iot-gate-ied-tpm0.dtbo \
imx8mm-cl-iot-gate-ied-tpm1.dtbo
+dtb-$(CONFIG_TARGET_SC573_EZKIT) += sc573-ezkit.dtb
+
ifneq ($(CONFIG_TARGET_IMX8MP_RSB3720A1_4G)$(CONFIG_TARGET_IMX8MP_RSB3720A1_6G),)
dtb-y += imx8mp-rsb3720-a1.dtb
endif
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) Copyright 2024 - Analog Devices, Inc.
+ */
+
+/dts-v1/;
+
+#include "sc57x.dtsi"
+
+/ {
+ model = "ADI SC573-EZKIT";
+ compatible = "adi,sc573-ezkit", "adi,sc57x";
+};
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) Copyright 2024 - Analog Devices, Inc.
+ */
+
+#include "sc5xx.dtsi"
+
+/ {
+ gic: interrupt-controller@310b2000 {
+ compatible = "arm,cortex-a5-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x310B2000 0x1000>,
+ <0x310B4000 0x100>;
+ };
+};
+
+&timer0 {
+ clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>;
+};
--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * (C) Copyright 2024 - Analog Devices, Inc.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/adi-sc5xx-clock.h>
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ clocks {
+ sys_clkin0: sys_clkin0 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ bootph-all;
+ };
+
+ sys_clkin1: sys_clkin1 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <25000000>;
+ bootph-all;
+ };
+ };
+
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "simple-bus";
+ device_type = "soc";
+ ranges;
+ bootph-all;
+
+ timer0: timer@31018000 {
+ compatible = "adi,sc5xx-gptimer";
+ reg = <0x31018004 0x100>,
+ <0x31018060 0x100>;
+ status = "okay";
+ bootph-all;
+ };
+
+ clk: clocks@3108d000 {
+ reg = <0x3108d000 0x1000>;
+ #clock-cells = <1>;
+ clocks = <&sys_clkin0>, <&sys_clkin1>;
+ clock-names = "sys_clkin0", "sys_clkin1";
+ status = "okay";
+ bootph-all;
+ };
+ };
+};