riscv: Add Sipeed Maix support

The Sipeed Maix series is a collection of boards built around the RISC-V
Kendryte K210 processor. This processor contains several peripherals to
accelerate neural network processing and other "ai" tasks. This includes a
"KPU" neural network processor, an audio processor supporting beamforming
reception, and a digital video port supporting capture and output at VGA
resolution. Other peripherals include 8M of sram (accessible with and
without caching); remappable pins, including 40 GPIOs; AES, FFT, and SHA256
accelerators; a DMA controller; and I2C, I2S, and SPI controllers. Maix
peripherals vary, but include spi flash; on-board usb-serial bridges; ports
for cameras, displays, and sd cards; and ESP32 chips. Currently, only the
Sipeed Maix Bit V2.0 (bitm) is supported, but the boards are fairly
similar.

Documentation for Maix boards is located at
<http://dl.sipeed.com/MAIX/HDK/>.  Documentation for the Kendryte K210 is
located at <https://kendryte.com/downloads/>. However, hardware details are
rather lacking, so most technical reference has been taken from the
standalone sdk located at
<https://github.com/kendryte/kendryte-standalone-sdk>.

Signed-off-by: Sean Anderson <seanga2@gmail.com>

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index ec5631c6404c85d6e48716eb76bbeb7b985276df..5d01f406a9dd4aa382138d5d375e023a342d4e25 100644 (file)
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -20,6 +20,9 @@ config TARGET_QEMU_VIRT
 config TARGET_SIFIVE_FU540
        bool "Support SiFive FU540 Board"
 
+config TARGET_SIPEED_MAIX
+       bool "Support Sipeed Maix Board"
+
 endchoice
 
 config SYS_ICACHE_OFF
@@ -53,6 +56,7 @@ source "board/AndesTech/ax25-ae350/Kconfig"
 source "board/emulation/qemu-riscv/Kconfig"
 source "board/microchip/mpfs_icicle/Kconfig"
 source "board/sifive/fu540/Kconfig"
+source "board/sipeed/maix/Kconfig"
 
 # platform-specific options below
 source "arch/riscv/cpu/ax25/Kconfig"

diff --git a/board/sipeed/maix/Kconfig b/board/sipeed/maix/Kconfig
new file mode 100644 (file)
index 0000000..0cdcd32
--- /dev/null
+++ b/board/sipeed/maix/Kconfig
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
+
+if TARGET_SIPEED_MAIX
+
+config SYS_BOARD
+       default "maix"
+
+config SYS_VENDOR
+       default "sipeed"
+
+config SYS_CPU
+       default "generic"
+
+config SYS_CONFIG_NAME
+       default "sipeed-maix"
+
+config SYS_TEXT_BASE
+       default 0x80000000
+
+config DEFAULT_DEVICE_TREE
+       default "k210-maix-bit"
+
+config NR_CPUS
+       default 2
+
+config NR_DRAM_BANKS
+       default 3
+
+config BOARD_SPECIFIC_OPTIONS
+       def_bool y
+       select GENERIC_RISCV
+       select RISCV_PRIV_1_9
+       imply SMP
+       imply DM_SERIAL
+       imply SIFIVE_SERIAL
+       imply SIFIVE_CLINT
+       imply POWER_DOMAIN
+       imply SIMPLE_PM_BUS
+       imply CLK_CCF
+       imply CLK_COMPOSITE_CCF
+       imply CLK_K210
+       imply DM_RESET
+       imply RESET_SYSCON
+       imply SYSRESET
+       imply SYSRESET_SYSCON
+endif

diff --git a/board/sipeed/maix/MAINTAINERS b/board/sipeed/maix/MAINTAINERS
new file mode 100644 (file)
index 0000000..e7bb9ec
--- /dev/null
+++ b/board/sipeed/maix/MAINTAINERS
@@ -0,0 +1,11 @@
+Sipeed Maix BOARD
+M:     Sean Anderson <seanga2@gmail.com>
+S:     Maintained
+F:     arch/riscv/dts/k210.dtsi
+F:     arch/riscv/dts/k210-maix-bit.dts
+F:     board/sipeed/maix/
+F:     configs/sipeed_maix_bitm_defconfig
+F:     doc/board/sipeed/
+F:     include/configs/sipeed-maix.h
+F:     include/dt-bindings/*/k210-sysctl.h
+F:     test/dm/k210_pll.c

diff --git a/board/sipeed/maix/Makefile b/board/sipeed/maix/Makefile
new file mode 100644 (file)
index 0000000..4acff5b
--- /dev/null
+++ b/board/sipeed/maix/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2019 Western Digital Corporation or its affiliates.
+
+obj-y += maix.o

diff --git a/board/sipeed/maix/maix.c b/board/sipeed/maix/maix.c
new file mode 100644 (file)
index 0000000..cbcb23c
--- /dev/null
+++ b/board/sipeed/maix/maix.c
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <fdt_support.h>
+#include <asm/io.h>
+
+phys_size_t get_effective_memsize(void)
+{
+       return CONFIG_SYS_SDRAM_SIZE;
+}
+
+int board_init(void)
+{
+       int ret, i;
+       const char * const banks[] = { "sram0", "sram1", "airam" };
+       ofnode memory;
+       struct clk clk;
+
+       /* Enable RAM clocks */
+       memory = ofnode_by_compatible(ofnode_null(), "kendryte,k210-sram");
+       if (ofnode_equal(memory, ofnode_null()))
+               return -ENOENT;
+
+       for (i = 0; i < ARRAY_SIZE(banks); i++) {
+               ret = clk_get_by_name_nodev(memory, banks[i], &clk);
+               if (ret)
+                       continue;
+
+               ret = clk_enable(&clk);
+               clk_free(&clk);
+               if (ret)
+                       return ret;
+       }
+
+       return 0;
+}

diff --git a/configs/sipeed_maix_bitm_defconfig b/configs/sipeed_maix_bitm_defconfig
new file mode 100644 (file)
index 0000000..f48f7f0
--- /dev/null
+++ b/configs/sipeed_maix_bitm_defconfig
@@ -0,0 +1,8 @@
+CONFIG_RISCV=y
+CONFIG_TARGET_SIPEED_MAIX=y
+CONFIG_ARCH_RV64I=y
+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
+# CONFIG_NET is not set
+# CONFIG_INPUT is not set
+# CONFIG_DM_ETH is not set
+# CONFIG_EFI_LOADER is not set

diff --git a/include/configs/sipeed-maix.h b/include/configs/sipeed-maix.h
new file mode 100644 (file)
index 0000000..a46473f
--- /dev/null
+++ b/include/configs/sipeed-maix.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
+ */
+
+#ifndef CONFIGS_SIPEED_MAIX_H
+#define CONFIGS_SIPEED_MAIX_H
+
+#include <linux/sizes.h>
+
+#define CONFIG_SYS_LOAD_ADDR 0x80000000
+/* Start just below the second bank so we don't clobber it during reloc */
+#define CONFIG_SYS_INIT_SP_ADDR 0x803FFFFF
+#define CONFIG_SYS_MALLOC_LEN SZ_128K
+#define CONFIG_SYS_CACHELINE_SIZE 64
+
+#define CONFIG_SYS_SDRAM_BASE 0x80000000
+/* Don't relocate into AI ram since it isn't set up yet */
+#define CONFIG_SYS_SDRAM_SIZE (SZ_4M + SZ_2M)
+
+/* For early init */
+#define K210_SYSCTL_BASE 0x50440000
+
+#endif /* CONFIGS_SIPEED_MAIX_H */