};
};
+ clk_fixed: clk-fixed {
+ u-boot,dm-pre-reloc;
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <1234>;
+ };
+
+ clk_sandbox: clk-sbox {
+ u-boot,dm-pre-reloc;
+ compatible = "sandbox,clk";
+ #clock-cells = <1>;
+ assigned-clocks = <&clk_sandbox 3>;
+ assigned-clock-rates = <321>;
+ };
+
+ clk-test {
+ u-boot,dm-pre-reloc;
+ compatible = "sandbox,clk-test";
+ clocks = <&clk_fixed>,
+ <&clk_sandbox 1>,
+ <&clk_sandbox 0>,
+ <&clk_sandbox 3>,
+ <&clk_sandbox 2>;
+ clock-names = "fixed", "i2c", "spi", "uart2", "uart1";
+ };
+
gpio_a: gpios@0 {
u-boot,dm-pre-reloc;
gpio-controller;
struct udevice *dev;
int i;
+ /* Skip the clock */
ut_assertok(uclass_first_device_err(UCLASS_MISC, &dev));
+ ut_asserteq_str("sandbox_clk_test", dev->name);
+
+ ut_assertok(uclass_next_device_err(&dev));
plat = dev_get_platdata(dev);
ut_assert(plat->boolval);
ut_asserteq(1, plat->intval);
return 0;
}
DM_TEST(dm_test_of_platdata_dev, UT_TESTF_SCAN_PDATA);
+
+/* Test handling of phandles that point to other devices */
+static int dm_test_of_platdata_phandle(struct unit_test_state *uts)
+{
+ struct dtd_sandbox_clk_test *plat;
+ struct udevice *dev, *clk;
+
+ ut_assertok(uclass_first_device_err(UCLASS_MISC, &dev));
+ ut_asserteq_str("sandbox_clk_test", dev->name);
+ plat = dev_get_platdata(dev);
+
+ ut_assertok(device_get_by_driver_info(plat->clocks[0].node, &clk));
+ ut_asserteq_str("fixed_clock", clk->name);
+
+ ut_assertok(device_get_by_driver_info(plat->clocks[1].node, &clk));
+ ut_asserteq_str("sandbox_clk", clk->name);
+ ut_asserteq(1, plat->clocks[1].arg[0]);
+
+ ut_assertok(device_get_by_driver_info(plat->clocks[2].node, &clk));
+ ut_asserteq_str("sandbox_clk", clk->name);
+ ut_asserteq(0, plat->clocks[2].arg[0]);
+
+ ut_assertok(device_get_by_driver_info(plat->clocks[3].node, &clk));
+ ut_asserteq_str("sandbox_clk", clk->name);
+ ut_asserteq(3, plat->clocks[3].arg[0]);
+
+ ut_assertok(device_get_by_driver_info(plat->clocks[4].node, &clk));
+ ut_asserteq_str("sandbox_clk", clk->name);
+ ut_asserteq(2, plat->clocks[4].arg[0]);
+
+ return 0;
+}
+DM_TEST(dm_test_of_platdata_phandle, UT_TESTF_SCAN_PDATA);