soc: zynqmp: Add support for zu1eg_lr device

There is new chip coming which is using new _lr suffix that's why record it
in the list to enable bitstream in bit format loading.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/12a939e2c88e82a9828852a8f7f33dfa14a6a4b8.1722351201.git.michal.simek@amd.com

diff --git a/drivers/soc/soc_xilinx_zynqmp.c b/drivers/soc/soc_xilinx_zynqmp.c
index a2d5b82fd34d1c6968c76fc9e484490f66420108..0c45c781fef40510a00b8c95b682a3392219f19c 100644 (file)
--- a/drivers/soc/soc_xilinx_zynqmp.c
+++ b/drivers/soc/soc_xilinx_zynqmp.c
@@ -44,6 +44,7 @@ enum {
        ZYNQMP_VARIANT_DR_SE = BIT(4),
        ZYNQMP_VARIANT_EG_SE = BIT(5),
        ZYNQMP_VARIANT_TEG = BIT(6),
+       ZYNQMP_VARIANT_EG_LR = BIT(7),
 };
 
 struct zynqmp_device {
@@ -64,6 +65,11 @@ static const struct zynqmp_device zynqmp_devices[] = {
                .device = 1,
                .variants = ZYNQMP_VARIANT_EG,
        },
+       {
+               .id = 0x04689093,
+               .device = 1,
+               .variants = ZYNQMP_VARIANT_EG_LR,
+       },
        {
                .id = 0x04711093,
                .device = 2,
@@ -300,6 +306,8 @@ static int soc_xilinx_zynqmp_detect_machine(struct udevice *dev, u32 idcode,
                strlcat(priv->machine, "eg", sizeof(priv->machine));
        } else if (device->variants & ZYNQMP_VARIANT_EG_SE) {
                strlcat(priv->machine, "eg_SE", sizeof(priv->machine));
+       } else if (device->variants & ZYNQMP_VARIANT_EG_LR) {
+               strlcat(priv->machine, "eg_LR", sizeof(priv->machine));
        } else if (device->variants & ZYNQMP_VARIANT_DR) {
                strlcat(priv->machine, "dr", sizeof(priv->machine));
        } else if (device->variants & ZYNQMP_VARIANT_DR_SE) {