dma: ti: k3-udma: Move udma_probe() below all APIs

The udma_probe() function was placed above many important APIs
related to bcdma, pktdma, which restricts these APIs to be accessed
during probe. So, move udma_probe() below all of them.

Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com>

diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index e23d09e6b816fb9c985568c01a385e811fbe6996..0543f5f4c827d0ba5960cbae93d87673efe20ce5 100644 (file)
--- a/drivers/dma/ti/k3-udma.c
+++ b/drivers/dma/ti/k3-udma.c
@@ -1700,141 +1700,6 @@ static int setup_resources(struct udma_dev *ud)
        return ch_count;
 }
 
-static int udma_probe(struct udevice *dev)
-{
-       struct dma_dev_priv *uc_priv = dev_get_uclass_priv(dev);
-       struct udma_dev *ud = dev_get_priv(dev);
-       int i, ret;
-       struct udevice *tmp;
-       struct udevice *tisci_dev = NULL;
-       struct udma_tisci_rm *tisci_rm = &ud->tisci_rm;
-       ofnode navss_ofnode = ofnode_get_parent(dev_ofnode(dev));
-
-       ud->match_data = (void *)dev_get_driver_data(dev);
-       ret = udma_get_mmrs(dev);
-       if (ret)
-               return ret;
-
-       ud->psil_base = ud->match_data->psil_base;
-
-       ret = uclass_get_device_by_phandle(UCLASS_FIRMWARE, dev,
-                                          "ti,sci", &tisci_dev);
-       if (ret) {
-               debug("Failed to get TISCI phandle (%d)\n", ret);
-               tisci_rm->tisci = NULL;
-               return -EINVAL;
-       }
-       tisci_rm->tisci = (struct ti_sci_handle *)
-                         (ti_sci_get_handle_from_sysfw(tisci_dev));
-
-       tisci_rm->tisci_dev_id = -1;
-       ret = dev_read_u32(dev, "ti,sci-dev-id", &tisci_rm->tisci_dev_id);
-       if (ret) {
-               dev_err(dev, "ti,sci-dev-id read failure %d\n", ret);
-               return ret;
-       }
-
-       tisci_rm->tisci_navss_dev_id = -1;
-       ret = ofnode_read_u32(navss_ofnode, "ti,sci-dev-id",
-                             &tisci_rm->tisci_navss_dev_id);
-       if (ret) {
-               dev_err(dev, "navss sci-dev-id read failure %d\n", ret);
-               return ret;
-       }
-
-       tisci_rm->tisci_udmap_ops = &tisci_rm->tisci->ops.rm_udmap_ops;
-       tisci_rm->tisci_psil_ops = &tisci_rm->tisci->ops.rm_psil_ops;
-
-       if (ud->match_data->type == DMA_TYPE_UDMA) {
-               ret = uclass_get_device_by_phandle(UCLASS_MISC, dev,
-                                                  "ti,ringacc", &tmp);
-               ud->ringacc = dev_get_priv(tmp);
-       } else {
-               struct k3_ringacc_init_data ring_init_data;
-
-               ring_init_data.tisci = ud->tisci_rm.tisci;
-               ring_init_data.tisci_dev_id = ud->tisci_rm.tisci_dev_id;
-               if (ud->match_data->type == DMA_TYPE_BCDMA) {
-                       ring_init_data.num_rings = ud->bchan_cnt +
-                                                  ud->tchan_cnt +
-                                                  ud->rchan_cnt;
-               } else {
-                       ring_init_data.num_rings = ud->rflow_cnt +
-                                                  ud->tflow_cnt;
-               }
-
-               ud->ringacc = k3_ringacc_dmarings_init(dev, &ring_init_data);
-       }
-       if (IS_ERR(ud->ringacc))
-               return PTR_ERR(ud->ringacc);
-
-       ud->dev = dev;
-       ret = setup_resources(ud);
-       if (ret < 0)
-               return ret;
-
-       ud->ch_count = ret;
-
-       for (i = 0; i < ud->bchan_cnt; i++) {
-               struct udma_bchan *bchan = &ud->bchans[i];
-
-               bchan->id = i;
-               bchan->reg_rt = ud->mmrs[MMR_BCHANRT] + i * 0x1000;
-       }
-
-       for (i = 0; i < ud->tchan_cnt; i++) {
-               struct udma_tchan *tchan = &ud->tchans[i];
-
-               tchan->id = i;
-               tchan->reg_chan = ud->mmrs[MMR_TCHAN] + UDMA_CH_100(i);
-               tchan->reg_rt = ud->mmrs[MMR_TCHANRT] + UDMA_CH_1000(i);
-       }
-
-       for (i = 0; i < ud->rchan_cnt; i++) {
-               struct udma_rchan *rchan = &ud->rchans[i];
-
-               rchan->id = i;
-               rchan->reg_chan = ud->mmrs[MMR_RCHAN] + UDMA_CH_100(i);
-               rchan->reg_rt = ud->mmrs[MMR_RCHANRT] + UDMA_CH_1000(i);
-       }
-
-       for (i = 0; i < ud->rflow_cnt; i++) {
-               struct udma_rflow *rflow = &ud->rflows[i];
-
-               rflow->id = i;
-               rflow->reg_rflow = ud->mmrs[MMR_RFLOW] + UDMA_CH_40(i);
-       }
-
-       for (i = 0; i < ud->ch_count; i++) {
-               struct udma_chan *uc = &ud->channels[i];
-
-               uc->ud = ud;
-               uc->id = i;
-               uc->config.remote_thread_id = -1;
-               uc->bchan = NULL;
-               uc->tchan = NULL;
-               uc->rchan = NULL;
-               uc->config.mapped_channel_id = -1;
-               uc->config.default_flow_id = -1;
-               uc->config.dir = DMA_MEM_TO_MEM;
-               sprintf(uc->name, "UDMA chan%d\n", i);
-               if (!i)
-                       uc->in_use = true;
-       }
-
-       pr_debug("%s(rev: 0x%08x) CAP0-3: 0x%08x, 0x%08x, 0x%08x, 0x%08x\n",
-                dev->name,
-                udma_read(ud->mmrs[MMR_GCFG], 0),
-                udma_read(ud->mmrs[MMR_GCFG], 0x20),
-                udma_read(ud->mmrs[MMR_GCFG], 0x24),
-                udma_read(ud->mmrs[MMR_GCFG], 0x28),
-                udma_read(ud->mmrs[MMR_GCFG], 0x2c));
-
-       uc_priv->supported = DMA_SUPPORTS_MEM_TO_MEM | DMA_SUPPORTS_MEM_TO_DEV;
-
-       return 0;
-}
-
 static int udma_push_to_ring(struct k3_nav_ring *ring, void *elem)
 {
        u64 addr = 0;
@@ -2717,6 +2582,141 @@ static int udma_get_cfg(struct dma *dma, u32 id, void **data)
        return -EINVAL;
 }
 
+static int udma_probe(struct udevice *dev)
+{
+       struct dma_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+       struct udma_dev *ud = dev_get_priv(dev);
+       int i, ret;
+       struct udevice *tmp;
+       struct udevice *tisci_dev = NULL;
+       struct udma_tisci_rm *tisci_rm = &ud->tisci_rm;
+       ofnode navss_ofnode = ofnode_get_parent(dev_ofnode(dev));
+
+       ud->match_data = (void *)dev_get_driver_data(dev);
+       ret = udma_get_mmrs(dev);
+       if (ret)
+               return ret;
+
+       ud->psil_base = ud->match_data->psil_base;
+
+       ret = uclass_get_device_by_phandle(UCLASS_FIRMWARE, dev,
+                                          "ti,sci", &tisci_dev);
+       if (ret) {
+               debug("Failed to get TISCI phandle (%d)\n", ret);
+               tisci_rm->tisci = NULL;
+               return -EINVAL;
+       }
+       tisci_rm->tisci = (struct ti_sci_handle *)
+                         (ti_sci_get_handle_from_sysfw(tisci_dev));
+
+       tisci_rm->tisci_dev_id = -1;
+       ret = dev_read_u32(dev, "ti,sci-dev-id", &tisci_rm->tisci_dev_id);
+       if (ret) {
+               dev_err(dev, "ti,sci-dev-id read failure %d\n", ret);
+               return ret;
+       }
+
+       tisci_rm->tisci_navss_dev_id = -1;
+       ret = ofnode_read_u32(navss_ofnode, "ti,sci-dev-id",
+                             &tisci_rm->tisci_navss_dev_id);
+       if (ret) {
+               dev_err(dev, "navss sci-dev-id read failure %d\n", ret);
+               return ret;
+       }
+
+       tisci_rm->tisci_udmap_ops = &tisci_rm->tisci->ops.rm_udmap_ops;
+       tisci_rm->tisci_psil_ops = &tisci_rm->tisci->ops.rm_psil_ops;
+
+       if (ud->match_data->type == DMA_TYPE_UDMA) {
+               ret = uclass_get_device_by_phandle(UCLASS_MISC, dev,
+                                                  "ti,ringacc", &tmp);
+               ud->ringacc = dev_get_priv(tmp);
+       } else {
+               struct k3_ringacc_init_data ring_init_data;
+
+               ring_init_data.tisci = ud->tisci_rm.tisci;
+               ring_init_data.tisci_dev_id = ud->tisci_rm.tisci_dev_id;
+               if (ud->match_data->type == DMA_TYPE_BCDMA) {
+                       ring_init_data.num_rings = ud->bchan_cnt +
+                                                  ud->tchan_cnt +
+                                                  ud->rchan_cnt;
+               } else {
+                       ring_init_data.num_rings = ud->rflow_cnt +
+                                                  ud->tflow_cnt;
+               }
+
+               ud->ringacc = k3_ringacc_dmarings_init(dev, &ring_init_data);
+       }
+       if (IS_ERR(ud->ringacc))
+               return PTR_ERR(ud->ringacc);
+
+       ud->dev = dev;
+       ret = setup_resources(ud);
+       if (ret < 0)
+               return ret;
+
+       ud->ch_count = ret;
+
+       for (i = 0; i < ud->bchan_cnt; i++) {
+               struct udma_bchan *bchan = &ud->bchans[i];
+
+               bchan->id = i;
+               bchan->reg_rt = ud->mmrs[MMR_BCHANRT] + i * 0x1000;
+       }
+
+       for (i = 0; i < ud->tchan_cnt; i++) {
+               struct udma_tchan *tchan = &ud->tchans[i];
+
+               tchan->id = i;
+               tchan->reg_chan = ud->mmrs[MMR_TCHAN] + UDMA_CH_100(i);
+               tchan->reg_rt = ud->mmrs[MMR_TCHANRT] + UDMA_CH_1000(i);
+       }
+
+       for (i = 0; i < ud->rchan_cnt; i++) {
+               struct udma_rchan *rchan = &ud->rchans[i];
+
+               rchan->id = i;
+               rchan->reg_chan = ud->mmrs[MMR_RCHAN] + UDMA_CH_100(i);
+               rchan->reg_rt = ud->mmrs[MMR_RCHANRT] + UDMA_CH_1000(i);
+       }
+
+       for (i = 0; i < ud->rflow_cnt; i++) {
+               struct udma_rflow *rflow = &ud->rflows[i];
+
+               rflow->id = i;
+               rflow->reg_rflow = ud->mmrs[MMR_RFLOW] + UDMA_CH_40(i);
+       }
+
+       for (i = 0; i < ud->ch_count; i++) {
+               struct udma_chan *uc = &ud->channels[i];
+
+               uc->ud = ud;
+               uc->id = i;
+               uc->config.remote_thread_id = -1;
+               uc->bchan = NULL;
+               uc->tchan = NULL;
+               uc->rchan = NULL;
+               uc->config.mapped_channel_id = -1;
+               uc->config.default_flow_id = -1;
+               uc->config.dir = DMA_MEM_TO_MEM;
+               sprintf(uc->name, "UDMA chan%d\n", i);
+               if (!i)
+                       uc->in_use = true;
+       }
+
+       pr_debug("%s(rev: 0x%08x) CAP0-3: 0x%08x, 0x%08x, 0x%08x, 0x%08x\n",
+                dev->name,
+                udma_read(ud->mmrs[MMR_GCFG], 0),
+                udma_read(ud->mmrs[MMR_GCFG], 0x20),
+                udma_read(ud->mmrs[MMR_GCFG], 0x24),
+                udma_read(ud->mmrs[MMR_GCFG], 0x28),
+                udma_read(ud->mmrs[MMR_GCFG], 0x2c));
+
+       uc_priv->supported = DMA_SUPPORTS_MEM_TO_MEM | DMA_SUPPORTS_MEM_TO_DEV;
+
+       return 0;
+}
+
 static const struct dma_ops udma_ops = {
        .transfer       = udma_transfer,
        .of_xlate       = udma_of_xlate,