]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
Arm: imx7d-pico: Import all Linux device tree for Pico i.MX7D SOM
authorJoris Offouga <offougajoris@gmail.com>
Thu, 4 Apr 2019 12:00:52 +0000 (14:00 +0200)
committerStefano Babic <sbabic@denx.de>
Thu, 25 Apr 2019 17:16:24 +0000 (19:16 +0200)
This patch imports the Linux kernel base board imx7d-pico.dtsi,
pi board imx7d-pico-pi.dts and hobbit board imx7d-pico-hobbit.dts
from Linux v5.1-rc1.

Signed-off-by: Joris Offouga <offougajoris@gmail.com>
arch/arm/dts/Makefile
arch/arm/dts/imx7d-pico-hobbit.dts [new file with mode: 0644]
arch/arm/dts/imx7d-pico-pi.dts [new file with mode: 0644]
arch/arm/dts/imx7d-pico.dtsi [new file with mode: 0644]

index ed99113d86757071cf46e1e932ddeea9f0bf75c1..e1bf714980d42796e9addc65374a6adc02044d17 100644 (file)
@@ -557,7 +557,10 @@ dtb-$(CONFIG_MX7) += imx7d-sdb.dtb \
        imx7d-sdb-qspi.dtb \
        imx7-colibri-emmc.dtb \
        imx7-colibri-rawnand.dtb \
-       imx7s-warp.dtb
+       imx7s-warp.dtb \
+       imx7d-pico-pi.dtb \
+       imx7d-pico-hobbit.dtb
+
 
 dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb
 
diff --git a/arch/arm/dts/imx7d-pico-hobbit.dts b/arch/arm/dts/imx7d-pico-hobbit.dts
new file mode 100644 (file)
index 0000000..98604f0
--- /dev/null
@@ -0,0 +1,105 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+//
+// Copyright 2017 NXP
+
+#include "imx7d-pico.dtsi"
+
+/ {
+       model = "TechNexion PICO-IMX7D Board using Hobbit baseboard";
+       compatible = "technexion,imx7d-pico-hobbit", "fsl,imx7d";
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_gpio_leds>;
+
+               led {
+                       label = "gpio-led";
+                       gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
+               };
+       };
+
+       sound {
+               compatible = "simple-audio-card";
+               simple-audio-card,name = "imx7-sgtl5000";
+               simple-audio-card,format = "i2s";
+               simple-audio-card,bitclock-master = <&dailink_master>;
+               simple-audio-card,frame-master = <&dailink_master>;
+               simple-audio-card,cpu {
+                       sound-dai = <&sai1>;
+               };
+
+               dailink_master: simple-audio-card,codec {
+                       sound-dai = <&sgtl5000>;
+                       clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
+               };
+       };
+};
+
+&i2c1 {
+       sgtl5000: codec@a {
+               #sound-dai-cells = <0>;
+               reg = <0x0a>;
+               compatible = "fsl,sgtl5000";
+               clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
+               VDDA-supply = <&reg_2p5v>;
+               VDDIO-supply = <&reg_vref_1v8>;
+       };
+};
+
+&i2c4 {
+       status = "okay";
+
+       adc081c: adc@50 {
+               compatible = "ti,adc081c";
+               reg = <0x50>;
+               vref-supply = <&reg_3p3v>;
+       };
+};
+
+&ecspi3 {
+       ads7846@0 {
+               reg = <0>;
+               compatible = "ti,ads7846";
+               interrupt-parent = <&gpio2>;
+               interrupts = <7 0>;
+               spi-max-frequency = <1000000>;
+               pendown-gpio = <&gpio2 7 0>;
+               vcc-supply = <&reg_3p3v>;
+               ti,x-min = /bits/ 16 <0>;
+               ti,x-max = /bits/ 16 <4095>;
+               ti,y-min = /bits/ 16 <0>;
+               ti,y-max = /bits/ 16 <4095>;
+               ti,pressure-max = /bits/ 16 <1024>;
+               ti,x-plate-ohms = /bits/ 16 <90>;
+               ti,y-plate-ohms = /bits/ 16 <90>;
+               ti,debounce-max = /bits/ 16 <70>;
+               ti,debounce-tol = /bits/ 16 <3>;
+               ti,debounce-rep = /bits/ 16 <2>;
+               ti,settle-delay-usec = /bits/ 16 <150>;
+               wakeup-source;
+       };
+};
+
+&iomuxc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_hog>;
+
+       pinctrl_hog: hoggrp {
+               fsl,pins = <
+                       MX7D_PAD_EPDC_DATA00__GPIO2_IO0         0x14
+                       MX7D_PAD_EPDC_DATA01__GPIO2_IO1         0x14
+                       MX7D_PAD_EPDC_DATA02__GPIO2_IO2         0x14
+                       MX7D_PAD_EPDC_DATA03__GPIO2_IO3         0x14
+                       MX7D_PAD_EPDC_DATA05__GPIO2_IO5         0x14
+                       MX7D_PAD_EPDC_DATA12__GPIO2_IO12        0x14
+                       MX7D_PAD_EPDC_DATA07__GPIO2_IO7         0x14
+               >;
+       };
+
+       pinctrl_gpio_leds: gpioledsgrp {
+               fsl,pins = <
+                       MX7D_PAD_EPDC_DATA13__GPIO2_IO13        0x14
+               >;
+       };
+};
\ No newline at end of file
diff --git a/arch/arm/dts/imx7d-pico-pi.dts b/arch/arm/dts/imx7d-pico-pi.dts
new file mode 100644 (file)
index 0000000..66ca590
--- /dev/null
@@ -0,0 +1,93 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+//
+// Copyright 2017 NXP
+
+#include "imx7d-pico.dtsi"
+
+/ {
+       model = "TechNexion PICO-IMX7D Board and PI baseboard";
+       compatible = "technexion,imx7d-pico-pi", "fsl,imx7d";
+
+       leds {
+               compatible = "gpio-leds";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_gpio_leds>;
+
+               led {
+                       label = "gpio-led";
+                       gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
+               };
+       };
+
+       sound {
+               compatible = "simple-audio-card";
+               simple-audio-card,name = "imx7-sgtl5000";
+               simple-audio-card,format = "i2s";
+               simple-audio-card,bitclock-master = <&dailink_master>;
+               simple-audio-card,frame-master = <&dailink_master>;
+               simple-audio-card,cpu {
+                       sound-dai = <&sai1>;
+               };
+
+               dailink_master: simple-audio-card,codec {
+                       sound-dai = <&sgtl5000>;
+                       clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
+               };
+       };
+};
+
+&i2c1 {
+       sgtl5000: codec@a {
+               #sound-dai-cells = <0>;
+               reg = <0x0a>;
+               compatible = "fsl,sgtl5000";
+               clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
+               VDDA-supply = <&reg_2p5v>;
+               VDDIO-supply = <&reg_vref_1v8>;
+       };
+};
+
+&i2c4 {
+       polytouch: touchscreen@38 {
+               compatible = "edt,edt-ft5x06";
+               reg = <0x38>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_touchscreen>;
+               interrupt-parent = <&gpio2>;
+               interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
+               reset-gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
+               touchscreen-size-x = <800>;
+               touchscreen-size-y = <480>;
+       };
+};
+
+&iomuxc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_hog>;
+
+       pinctrl_hog: hoggrp {
+               fsl,pins = <
+                       MX7D_PAD_EPDC_DATA00__GPIO2_IO0         0x14
+                       MX7D_PAD_EPDC_DATA01__GPIO2_IO1         0x14
+                       MX7D_PAD_EPDC_DATA02__GPIO2_IO2         0x14
+                       MX7D_PAD_EPDC_DATA03__GPIO2_IO3         0x14
+                       MX7D_PAD_EPDC_DATA05__GPIO2_IO5         0x14
+                       MX7D_PAD_EPDC_DATA12__GPIO2_IO12        0x14
+                       MX7D_PAD_EPDC_DATA07__GPIO2_IO7         0x14
+               >;
+       };
+
+       pinctrl_gpio_leds: gpioledsgrp {
+               fsl,pins = <
+                       MX7D_PAD_EPDC_DATA06__GPIO2_IO6         0x14
+               >;
+       };
+
+       pinctrl_touchscreen: touchscreengrp {
+               fsl,pins = <
+                       MX7D_PAD_EPDC_DATA04__GPIO2_IO4         0x14
+                       MX7D_PAD_EPDC_DATA13__GPIO2_IO13        0x14
+               >;
+       };
+
+};
\ No newline at end of file
diff --git a/arch/arm/dts/imx7d-pico.dtsi b/arch/arm/dts/imx7d-pico.dtsi
new file mode 100644 (file)
index 0000000..d1a4079
--- /dev/null
@@ -0,0 +1,586 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+//
+// Copyright 2017 NXP
+
+/dts-v1/;
+
+#include "imx7d.dtsi"
+
+
+/ {
+       /* Will be filled by the bootloader */
+       memory@80000000 {
+               device_type = "memory";
+               reg = <0x80000000 0>;
+       };
+
+       reg_wlreg_on: regulator-wlreg_on {
+               compatible = "regulator-fixed";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_reg_wlreg_on>;
+               regulator-name = "wlreg_on";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               gpio = <&gpio4 16 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
+       reg_2p5v: regulator-2p5v {
+               compatible = "regulator-fixed";
+               regulator-name = "2P5V";
+               regulator-min-microvolt = <2500000>;
+               regulator-max-microvolt = <2500000>;
+               regulator-always-on;
+       };
+
+       reg_3p3v: regulator-3p3v {
+               compatible = "regulator-fixed";
+               regulator-name = "3P3V";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+       };
+
+       reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_usbotg1_pwr>;
+               compatible = "regulator-fixed";
+               regulator-name = "usb_otg1_vbus";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               gpio = <&gpio4 5 GPIO_ACTIVE_LOW>;
+       };
+
+       reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
+               compatible = "regulator-fixed";
+               regulator-name = "usb_otg2_vbus";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+       };
+
+       reg_vref_1v8: regulator-vref-1v8 {
+               compatible = "regulator-fixed";
+               regulator-name = "vref-1v8";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+       };
+
+       usdhc2_pwrseq: usdhc2_pwrseq {
+               compatible = "mmc-pwrseq-simple";
+               clocks = <&clks IMX7D_CLKO2_ROOT_DIV>;
+               clock-names = "ext_clock";
+       };
+};
+
+&clks {
+       assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>,
+                         <&clks IMX7D_CLKO2_ROOT_DIV>;
+       assigned-clock-parents = <&clks IMX7D_CKIL>;
+       assigned-clock-rates = <0>, <32768>;
+};
+
+&ecspi3 {
+       cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_ecspi3>;
+       status = "okay";
+};
+
+&fec1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_enet1>;
+       assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
+                         <&clks IMX7D_ENET1_TIME_ROOT_CLK>;
+       assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
+       assigned-clock-rates = <0>, <100000000>;
+       phy-mode = "rgmii";
+       phy-handle = <&ethphy0>;
+       fsl,magic-packet;
+       phy-reset-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
+       status = "okay";
+
+       mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               ethphy0: ethernet-phy@1 {
+                       compatible = "ethernet-phy-ieee802.3-c22";
+                       reg = <1>;
+                       status = "okay";
+               };
+       };
+};
+
+&flexcan1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_can1>;
+       status = "okay";
+};
+
+&flexcan2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_can2>;
+       status = "okay";
+};
+
+&i2c1 {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c1>;
+       status = "okay";
+};
+
+&i2c2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c2>;
+       status = "okay";
+};
+
+&i2c4 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c4>;
+       status = "okay";
+
+       pmic: pfuze3000@8 {
+               compatible = "fsl,pfuze3000";
+               reg = <0x08>;
+
+               regulators {
+                       sw1a_reg: sw1a {
+                               regulator-min-microvolt = <700000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                               regulator-ramp-delay = <6250>;
+                       };
+                       /* use sw1c_reg to align with pfuze100/pfuze200 */
+                       sw1c_reg: sw1b {
+                               regulator-min-microvolt = <700000>;
+                               regulator-max-microvolt = <1475000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                               regulator-ramp-delay = <6250>;
+                       };
+
+                       sw2_reg: sw2 {
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1850000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       sw3a_reg: sw3 {
+                               regulator-min-microvolt = <900000>;
+                               regulator-max-microvolt = <1650000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       swbst_reg: swbst {
+                               regulator-min-microvolt = <5000000>;
+                               regulator-max-microvolt = <5150000>;
+                       };
+
+                       snvs_reg: vsnvs {
+                               regulator-min-microvolt = <1000000>;
+                               regulator-max-microvolt = <3000000>;
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       vref_reg: vrefddr {
+                               regulator-boot-on;
+                               regulator-always-on;
+                       };
+
+                       vgen1_reg: vldo1 {
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
+                       };
+
+                       vgen2_reg: vldo2 {
+                               regulator-min-microvolt = <800000>;
+                               regulator-max-microvolt = <1550000>;
+                       };
+
+                       vgen3_reg: vccsd {
+                               regulator-min-microvolt = <2850000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
+                       };
+
+                       vgen4_reg: v33 {
+                               regulator-min-microvolt = <2850000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
+                       };
+
+                       vgen5_reg: vldo3 {
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
+                       };
+
+                       vgen6_reg: vldo4 {
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
+                       };
+               };
+       };
+};
+
+&sai1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_sai1>;
+       assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
+                         <&clks IMX7D_SAI1_ROOT_CLK>;
+       assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
+       assigned-clock-rates = <0>, <24576000>;
+       status = "okay";
+};
+
+
+&pwm1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm1>;
+       status = "okay";
+};
+
+&pwm2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm2>;
+       status = "okay";
+};
+
+&pwm3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm3>;
+       status = "okay";
+};
+
+&pwm4 { /* Backlight */
+       status = "okay";
+};
+
+&uart5 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart5>;
+       assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
+       assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
+       status = "okay";
+};
+
+&uart6 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart6>;
+       assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
+       assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
+       uart-has-rtscts;
+       status = "okay";
+};
+
+&uart7 { /* Bluetooth */
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart7>;
+       assigned-clocks = <&clks IMX7D_UART7_ROOT_SRC>;
+       assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
+       uart-has-rtscts;
+       status = "okay";
+};
+
+&usbotg1 {
+       vbus-supply = <&reg_usb_otg1_vbus>;
+       status = "okay";
+};
+
+&usbotg2 {
+       vbus-supply = <&reg_usb_otg2_vbus>;
+       dr_mode = "host";
+       status = "okay";
+};
+
+&usdhc1 {
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
+       pinctrl-0 = <&pinctrl_usdhc1>;
+       pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+       cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
+       bus-width = <4>;
+       tuning-step = <2>;
+       vmmc-supply = <&reg_3p3v>;
+       wakeup-source;
+       no-1-8-v;
+       keep-power-in-suspend;
+       status = "okay";
+};
+
+&usdhc2 { /* Wifi SDIO */
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc2 &pinctrl_wifi_clk>;
+       no-1-8-v;
+       non-removable;
+       keep-power-in-suspend;
+       wakeup-source;
+       vmmc-supply = <&reg_wlreg_on>;
+       mmc-pwrseq = <&usdhc2_pwrseq>;
+       status = "okay";
+};
+
+&usdhc3 {
+       pinctrl-names = "default", "state_100mhz", "state_200mhz";
+       pinctrl-0 = <&pinctrl_usdhc3>;
+       pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+       pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+       assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
+       assigned-clock-rates = <400000000>;
+       bus-width = <8>;
+       no-1-8-v;
+       fsl,tuning-step = <2>;
+       non-removable;
+       status = "okay";
+};
+
+&wdog1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_wdog>;
+       fsl,ext-reset-output;
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl_ecspi3: ecspi3grp {
+               fsl,pins = <
+                       MX7D_PAD_I2C1_SCL__ECSPI3_MISO          0x2
+                       MX7D_PAD_I2C1_SDA__ECSPI3_MOSI          0x2
+                       MX7D_PAD_I2C2_SCL__ECSPI3_SCLK          0x2
+                       MX7D_PAD_I2C2_SDA__GPIO4_IO11           0x14
+               >;
+       };
+
+       pinctrl_i2c1: i2c1grp {
+               fsl,pins = <
+                       MX7D_PAD_UART1_TX_DATA__I2C1_SDA        0x4000007f
+                       MX7D_PAD_UART1_RX_DATA__I2C1_SCL        0x4000007f
+               >;
+       };
+
+       pinctrl_i2c2: i2c2grp {
+               fsl,pins = <
+                       MX7D_PAD_UART2_TX_DATA__I2C2_SDA        0x4000007f
+                       MX7D_PAD_UART2_RX_DATA__I2C2_SCL        0x4000007f
+               >;
+       };
+
+       pinctrl_enet1: enet1grp {
+               fsl,pins = <
+                       MX7D_PAD_SD2_CD_B__ENET1_MDIO                   0x3
+                       MX7D_PAD_SD2_WP__ENET1_MDC                      0x3
+                       MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC       0x1
+                       MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0       0x1
+                       MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1       0x1
+                       MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2       0x1
+                       MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3       0x1
+                       MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x1
+                       MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC       0x1
+                       MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0       0x1
+                       MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1       0x1
+                       MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2       0x1
+                       MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3       0x1
+                       MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x1
+                       MX7D_PAD_SD3_RESET_B__GPIO6_IO11                0x1  /* Ethernet reset */
+               >;
+       };
+
+       pinctrl_can1: can1frp {
+               fsl,pins = <
+                       MX7D_PAD_SAI1_RX_DATA__FLEXCAN1_RX      0x59
+                       MX7D_PAD_SAI1_TX_BCLK__FLEXCAN1_TX      0x59
+               >;
+       };
+
+       pinctrl_can2: can2frp {
+               fsl,pins = <
+                       MX7D_PAD_SAI1_TX_SYNC__FLEXCAN2_RX      0x59
+                       MX7D_PAD_SAI1_TX_DATA__FLEXCAN2_TX      0x59
+               >;
+       };
+
+       pinctrl_i2c4: i2c4grp {
+               fsl,pins = <
+                       MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA         0x4000007f
+                       MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL         0x4000007f
+               >;
+       };
+
+       pinctrl_pwm1: pwm1 {
+               fsl,pins = <
+                       MX7D_PAD_GPIO1_IO08__PWM1_OUT   0x7f
+               >;
+       };
+
+       pinctrl_pwm2: pwm2 {
+               fsl,pins = <
+                       MX7D_PAD_GPIO1_IO09__PWM2_OUT   0x7f
+               >;
+       };
+
+       pinctrl_pwm3: pwm3 {
+               fsl,pins = <
+                       MX7D_PAD_GPIO1_IO10__PWM3_OUT   0x7f
+               >;
+       };
+
+       pinctrl_reg_wlreg_on: regregongrp {
+               fsl,pins = <
+                       MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16        0x59
+               >;
+       };
+
+       pinctrl_sai1: sai1grp {
+               fsl,pins = <
+                       MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK     0x1f
+                       MX7D_PAD_ENET1_CRS__SAI1_TX_SYNC        0x1f
+                       MX7D_PAD_ENET1_COL__SAI1_TX_DATA0       0x30
+                       MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0    0x1f
+               >;
+       };
+
+       pinctrl_uart5: uart5grp {
+               fsl,pins = <
+                       MX7D_PAD_I2C4_SDA__UART5_DCE_TX         0x79
+                       MX7D_PAD_I2C4_SCL__UART5_DCE_RX         0x79
+               >;
+       };
+
+       pinctrl_uart6: uart6grp {
+               fsl,pins = <
+                       MX7D_PAD_EPDC_DATA08__UART6_DCE_RX      0x79
+                       MX7D_PAD_EPDC_DATA09__UART6_DCE_TX      0x79
+                       MX7D_PAD_EPDC_DATA10__UART6_DCE_RTS     0x79
+                       MX7D_PAD_EPDC_DATA11__UART6_DCE_CTS     0x79
+               >;
+       };
+
+       pinctrl_uart7: uart7grp {
+               fsl,pins = <
+                       MX7D_PAD_ECSPI2_MOSI__UART7_DCE_TX      0x79
+                       MX7D_PAD_ECSPI2_SCLK__UART7_DCE_RX      0x79
+                       MX7D_PAD_ECSPI2_SS0__UART7_DCE_CTS      0x79
+                       MX7D_PAD_ECSPI2_MISO__UART7_DCE_RTS     0x79
+               >;
+       };
+
+       pinctrl_usbotg1_pwr: usbotg_pwr {
+               fsl,pins = <
+                       MX7D_PAD_UART3_TX_DATA__GPIO4_IO5       0x14
+               >;
+       };
+
+       pinctrl_usdhc1: usdhc1grp {
+               fsl,pins = <
+                       MX7D_PAD_SD1_CMD__SD1_CMD               0x59
+                       MX7D_PAD_SD1_CLK__SD1_CLK               0x19
+                       MX7D_PAD_SD1_DATA0__SD1_DATA0           0x59
+                       MX7D_PAD_SD1_DATA1__SD1_DATA1           0x59
+                       MX7D_PAD_SD1_DATA2__SD1_DATA2           0x59
+                       MX7D_PAD_SD1_DATA3__SD1_DATA3           0x59
+                       MX7D_PAD_SD1_CD_B__GPIO5_IO0            0x15
+               >;
+       };
+
+       pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
+               fsl,pins = <
+                       MX7D_PAD_SD1_CMD__SD1_CMD               0x5a
+                       MX7D_PAD_SD1_CLK__SD1_CLK               0x1a
+                       MX7D_PAD_SD1_DATA0__SD1_DATA0           0x5a
+                       MX7D_PAD_SD1_DATA1__SD1_DATA1           0x5a
+                       MX7D_PAD_SD1_DATA2__SD1_DATA2           0x5a
+                       MX7D_PAD_SD1_DATA3__SD1_DATA3           0x5a
+                       MX7D_PAD_SD1_CD_B__GPIO5_IO0            0x15
+               >;
+       };
+
+       pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
+               fsl,pins = <
+                       MX7D_PAD_SD1_CMD__SD1_CMD               0x5b
+                       MX7D_PAD_SD1_CLK__SD1_CLK               0x1b
+                       MX7D_PAD_SD1_DATA0__SD1_DATA0           0x5b
+                       MX7D_PAD_SD1_DATA1__SD1_DATA1           0x5b
+                       MX7D_PAD_SD1_DATA2__SD1_DATA2           0x5b
+                       MX7D_PAD_SD1_DATA3__SD1_DATA3           0x5b
+                       MX7D_PAD_SD1_CD_B__GPIO5_IO0            0x15
+               >;
+       };
+
+       pinctrl_usdhc2: usdhc2grp {
+               fsl,pins = <
+                       MX7D_PAD_SD2_CMD__SD2_CMD               0x59
+                       MX7D_PAD_SD2_CLK__SD2_CLK               0x19
+                       MX7D_PAD_SD2_DATA0__SD2_DATA0           0x59
+                       MX7D_PAD_SD2_DATA1__SD2_DATA1           0x59
+                       MX7D_PAD_SD2_DATA2__SD2_DATA2           0x59
+                       MX7D_PAD_SD2_DATA3__SD2_DATA3           0x59
+               >;
+       };
+
+       pinctrl_usdhc3: usdhc3grp {
+               fsl,pins = <
+                       MX7D_PAD_SD3_CMD__SD3_CMD               0x59
+                       MX7D_PAD_SD3_CLK__SD3_CLK               0x19
+                       MX7D_PAD_SD3_DATA0__SD3_DATA0           0x59
+                       MX7D_PAD_SD3_DATA1__SD3_DATA1           0x59
+                       MX7D_PAD_SD3_DATA2__SD3_DATA2           0x59
+                       MX7D_PAD_SD3_DATA3__SD3_DATA3           0x59
+                       MX7D_PAD_SD3_DATA4__SD3_DATA4           0x59
+                       MX7D_PAD_SD3_DATA5__SD3_DATA5           0x59
+                       MX7D_PAD_SD3_DATA6__SD3_DATA6           0x59
+                       MX7D_PAD_SD3_DATA7__SD3_DATA7           0x59
+               >;
+       };
+
+       pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
+               fsl,pins = <
+                       MX7D_PAD_SD3_CMD__SD3_CMD               0x5a
+                       MX7D_PAD_SD3_CLK__SD3_CLK               0x1a
+                       MX7D_PAD_SD3_DATA0__SD3_DATA0           0x5a
+                       MX7D_PAD_SD3_DATA1__SD3_DATA1           0x5a
+                       MX7D_PAD_SD3_DATA2__SD3_DATA2           0x5a
+                       MX7D_PAD_SD3_DATA3__SD3_DATA3           0x5a
+                       MX7D_PAD_SD3_DATA4__SD3_DATA4           0x5a
+                       MX7D_PAD_SD3_DATA5__SD3_DATA5           0x5a
+                       MX7D_PAD_SD3_DATA6__SD3_DATA6           0x5a
+                       MX7D_PAD_SD3_DATA7__SD3_DATA7           0x5a
+               >;
+       };
+
+       pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
+               fsl,pins = <
+                       MX7D_PAD_SD3_CMD__SD3_CMD               0x5b
+                       MX7D_PAD_SD3_CLK__SD3_CLK               0x1b
+                       MX7D_PAD_SD3_DATA0__SD3_DATA0           0x5b
+                       MX7D_PAD_SD3_DATA1__SD3_DATA1           0x5b
+                       MX7D_PAD_SD3_DATA2__SD3_DATA2           0x5b
+                       MX7D_PAD_SD3_DATA3__SD3_DATA3           0x5b
+                       MX7D_PAD_SD3_DATA4__SD3_DATA4           0x5b
+                       MX7D_PAD_SD3_DATA5__SD3_DATA5           0x5b
+                       MX7D_PAD_SD3_DATA6__SD3_DATA6           0x5b
+                       MX7D_PAD_SD3_DATA7__SD3_DATA7           0x5b
+               >;
+       };
+};
+
+&iomuxc_lpsr {
+       pinctrl_wifi_clk: wificlkgrp {
+               fsl,pins = <
+                       MX7D_PAD_LPSR_GPIO1_IO03__CCM_CLKO2     0x7d
+               >;
+       };
+
+       pinctrl_wdog: wdoggrp {
+               fsl,pins = <
+                       MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B  0x74
+               >;
+       };
+};
\ No newline at end of file