imx: mx7dsabresd: Add QSPI support

Support qspi flashes for mx7dsabresd
1. introduce pin mux settings
2. enable qspi clock
3. introduce related macro definitions

Default QSPI is not enabled, since we need hardware rework to use QSPI,
see SPF-28590, page 9:
"
QSPI signals are muxed with EPDC_D[7:0]
When using QSPI: de-populate R388-R391, R396-R399
populate R392-R395, R299, R300
"

After hardware rework, define CONFIG_FSL_QSPI in mx7dsabresd.h. qspi
flashes can be deteced and read/erase/write. Log info:
"
=> sf probe
SF: Detected MX25L51235F with page size 256 Bytes, erase size 64 KiB, total 64 MiB
=> sf read 0x80000000 0 0x4000000
device 0 whole chip
SF: 67108864 bytes @ 0x0 Read: OK
=> sf erase 0 0x4000000
SF: 67108864 bytes @ 0x0 Erased: OK
=> sf write 0x80000000 0 0x4000000
device 0 whole chip
SF: 67108864 bytes @ 0x0 Written: OK
"

Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Adrian Alonso <aalonso@freescale.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>

diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c
index 6c863dae5a2509a0592f2ee8e68581fb5becd8c8..f8ae9733fc0ba5521bae4a461f31ca488feb673c 100644 (file)
--- a/board/freescale/mx7dsabresd/mx7dsabresd.c
+++ b/board/freescale/mx7dsabresd/mx7dsabresd.c
@@ -44,6 +44,9 @@ DECLARE_GLOBAL_DATA_PTR;
 #define LCD_PAD_CTRL    (PAD_CTL_HYS | PAD_CTL_PUS_PU100KOHM | \
        PAD_CTL_DSE_3P3V_49OHM)
 
+#define QSPI_PAD_CTRL  \
+       (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUE | PAD_CTL_PUS_PU47KOHM)
+
 #ifdef CONFIG_SYS_I2C_MXC
 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
 /* I2C1 for PMIC */
@@ -455,6 +458,29 @@ int board_phy_config(struct phy_device *phydev)
 }
 #endif
 
+#ifdef CONFIG_FSL_QSPI
+static iomux_v3_cfg_t const quadspi_pads[] = {
+       MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0 | MUX_PAD_CTRL(QSPI_PAD_CTRL),
+       MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1 | MUX_PAD_CTRL(QSPI_PAD_CTRL),
+       MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2 | MUX_PAD_CTRL(QSPI_PAD_CTRL),
+       MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3 | MUX_PAD_CTRL(QSPI_PAD_CTRL),
+       MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK  | MUX_PAD_CTRL(QSPI_PAD_CTRL),
+       MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B | MUX_PAD_CTRL(QSPI_PAD_CTRL),
+};
+
+int board_qspi_init(void)
+{
+       /* Set the iomux */
+       imx_iomux_v3_setup_multiple_pads(quadspi_pads,
+                                        ARRAY_SIZE(quadspi_pads));
+
+       /* Set the clock */
+       set_clk_qspi();
+
+       return 0;
+}
+#endif
+
 int board_early_init_f(void)
 {
        setup_iomux_uart();
@@ -481,6 +507,10 @@ int board_init(void)
        setup_lcd();
 #endif
 
+#ifdef CONFIG_FSL_QSPI
+       board_qspi_init();
+#endif
+
        return 0;
 }
 

diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h
index cc98547461a0bd8b80b8a491d652bc913757199a..22e515cccd4f4bff95f2cfb0718c4d1af1da059a 100644 (file)
--- a/include/configs/mx7dsabresd.h
+++ b/include/configs/mx7dsabresd.h
@@ -236,4 +236,19 @@
 #define CONFIG_VIDEO_BMP_LOGO
 #endif
 
+#ifdef CONFIG_FSL_QSPI
+#define CONFIG_CMD_SF
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_MACRONIX
+#define CONFIG_SPI_FLASH_BAR
+#define CONFIG_SF_DEFAULT_BUS          0
+#define CONFIG_SF_DEFAULT_CS           0
+#define CONFIG_SF_DEFAULT_SPEED                40000000
+#define CONFIG_SF_DEFAULT_MODE         SPI_MODE_0
+#define FSL_QSPI_FLASH_NUM             1
+#define FSL_QSPI_FLASH_SIZE            SZ_64M
+#define QSPI0_BASE_ADDR                        QSPI1_IPS_BASE_ADDR
+#define QSPI0_AMBA_BASE                        QSPI0_ARB_BASE_ADDR
+#endif
+
 #endif /* __CONFIG_H */