]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
rockchip: rk3399: Sort nodes in u-boot.dtsi files
authorJonas Karlman <jonas@kwiboo.se>
Tue, 30 Apr 2024 15:30:20 +0000 (15:30 +0000)
committerKever Yang <kever.yang@rock-chips.com>
Tue, 7 May 2024 07:56:08 +0000 (15:56 +0800)
Sort nodes alphabetically by name, symbol or reg addr in RK3399 related
u-boot.dtsi files. Also remove one of the duplicated &pmu nodes.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
arch/arm/dts/rk3399-evb-u-boot.dtsi
arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
arch/arm/dts/rk3399-u-boot.dtsi

index 9df4a02c3e740f6938f517b8e262e0c924a0115b..6dedfeec07228a061576fe6cfd87fd5f24c405bf 100644 (file)
        bootph-all;
 };
 
+&sdmmc {
+       bus-width = <4>;
+       cap-mmc-highspeed;
+       cap-sd-highspeed;
+       cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+       disable-wp;
+       max-frequency = <150000000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
+       status = "okay";
+};
+
 &tcphy1 {
        status = "okay";
 };
 &vdd_center {
        regulator-init-microvolt = <900000>;
 };
-
-&sdmmc {
-       bus-width = <4>;
-       cap-mmc-highspeed;
-       cap-sd-highspeed;
-       cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
-       disable-wp;
-       max-frequency = <150000000>;
-       pinctrl-names = "default";
-       pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
-       status = "okay";
-};
index e390cf3abab53ce935f0e7d60376994acf5b3ff9..58a3c0afcddd6e3d85b7c2f80072528706ceae1b 100644 (file)
        };
 };
 
-&vdd_log {
-       regulator-min-microvolt = <430000>;
-       regulator-init-microvolt = <950000>;
+&vcc5v0_host {
+       regulator-always-on;
 };
 
-&vcc5v0_host {
+&vcc_sdio {
        regulator-always-on;
 };
 
@@ -51,6 +50,7 @@
        regulator-always-on;
 };
 
-&vcc_sdio {
-       regulator-always-on;
+&vdd_log {
+       regulator-min-microvolt = <430000>;
+       regulator-init-microvolt = <950000>;
 };
index 96523a138ae36f6cdf10c6bba0b8435f274078f7..b9b8d3ee1d921e7da02c324b48b65a2a8d3a1f8c 100644 (file)
                u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
        };
 
-       cic: syscon@ff620000 {
+       pmusgrf: syscon@ff330000 {
+               compatible = "rockchip,rk3399-pmusgrf", "syscon";
+               reg = <0x0 0xff330000 0x0 0xe3d4>;
                bootph-all;
+       };
+
+       cic: syscon@ff620000 {
                compatible = "rockchip,rk3399-cic", "syscon";
                reg = <0x0 0xff620000 0x0 0x100>;
+               bootph-all;
        };
 
        dfi: dfi@ff630000 {
-               bootph-all;
                reg = <0x00 0xff630000 0x00 0x4000>;
                compatible = "rockchip,rk3399-dfi";
                rockchip,pmu = <&pmugrf>;
                clocks = <&cru PCLK_DDR_MON>;
                clock-names = "pclk_ddr_mon";
+               bootph-all;
        };
 
        rng: rng@ff8b8000 {
        };
 
        dmc: dmc {
-               bootph-all;
                compatible = "rockchip,rk3399-dmc";
-               devfreq-events = <&dfi>;
-               interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;
-               clocks = <&cru SCLK_DDRCLK>;
-               clock-names = "dmc_clk";
                reg = <0x0 0xffa80000 0x0 0x0800
                       0x0 0xffa80800 0x0 0x1800
                       0x0 0xffa82000 0x0 0x2000
                       0x0 0xffa88800 0x0 0x1800
                       0x0 0xffa8a000 0x0 0x2000
                       0x0 0xffa8c000 0x0 0x1000>;
-       };
-
-       pmusgrf: syscon@ff330000 {
+               devfreq-events = <&dfi>;
+               interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;
+               clocks = <&cru SCLK_DDRCLK>;
+               clock-names = "dmc_clk";
                bootph-all;
-               compatible = "rockchip,rk3399-pmusgrf", "syscon";
-               reg = <0x0 0xff330000 0x0 0xe3d4>;
        };
-
 };
 
 #if defined(CONFIG_ROCKCHIP_SPI_IMAGE) && defined(CONFIG_HAS_ROM)
        bootph-all;
 };
 
-&pmugrf {
-       bootph-all;
-};
-
-&pmu {
+&pmucru {
        bootph-all;
 };
 
-&pmucru {
+&pmugrf {
        bootph-all;
 };
 
 &sdhci {
-       max-frequency = <200000000>;
        bootph-all;
+       max-frequency = <200000000>;
+
+       /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
        u-boot,spl-fifo-mode;
 };