]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
xilinx: Remove the legacy property "#stream-id-cells"
authorAyan Kumar Halder <ayankuma@amd.com>
Wed, 22 Jun 2022 08:26:57 +0000 (10:26 +0200)
committerMichal Simek <michal.simek@amd.com>
Tue, 26 Jul 2022 06:23:54 +0000 (08:23 +0200)
"#stream-id-cells" was being used with "mmu-masters" for Xen specific
device trees.
With Xen commit 2278d2cbb0b7c1b48b298c6c4c6a7de2271ac928 (Link below)
Xen is able to support smmu bindings in both formats ie :
1. Using iommus (linux format)
2. Using mmu-masters (legacy format).

Thus, "#stream-id-cells" which was used for the legacy format, can be
removed as Xen can use smmu bindings in linux format.

Link: https://www.mail-archive.com/xen-devel@lists.xenproject.org/msg101649.html
Signed-off-by: Ayan Kumar Halder <ayankuma@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1e062acb233dee47cd7dd2429cb482132617cbc8.1655886415.git.michal.simek@amd.com
arch/arm/dts/versal-mini-emmc0.dts
arch/arm/dts/versal-mini-emmc1.dts
arch/arm/dts/zynqmp.dtsi

index 6a6e7467a233be65b18dc9bde24a4d103f080520..7c81a82fb92dc1616f103317b9bec8a6d36051be 100644 (file)
@@ -47,7 +47,6 @@
                        xlnx,device_id = <0>;
                        no-1-8-v;
                        xlnx,mio-bank = <0>;
-                       #stream-id-cells = <1>;
                };
        };
 
index c342e6bdf7ad6323e53bfb9ad2894040ba4bf1e9..bf7569d4cca41c655339bcc01c3b3aee86148915 100644 (file)
@@ -47,7 +47,6 @@
                        xlnx,device_id = <1>;
                        no-1-8-v;
                        xlnx,mio-bank = <0>;
-                       #stream-id-cells = <1>;
                };
        };
 
index dae8f0669df8abbecc538a8c8370d27bee28e05b..fbc6e752da9328fe9ed9b089d1a7042623a4e05b 100644 (file)
                        interrupts = <0 124 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <128>;
-                       #stream-id-cells = <1>;
                        iommus = <&smmu 0x14e8>;
                        power-domains = <&zynqmp_firmware PD_GDMA>;
                        #dma-cells = <1>;
                        interrupts = <0 125 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <128>;
-                       #stream-id-cells = <1>;
                        iommus = <&smmu 0x14e9>;
                        power-domains = <&zynqmp_firmware PD_GDMA>;
                        #dma-cells = <1>;
                        interrupts = <0 126 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <128>;
-                       #stream-id-cells = <1>;
                        iommus = <&smmu 0x14ea>;
                        power-domains = <&zynqmp_firmware PD_GDMA>;
                        #dma-cells = <1>;
                        interrupts = <0 127 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <128>;
-                       #stream-id-cells = <1>;
                        iommus = <&smmu 0x14eb>;
                        power-domains = <&zynqmp_firmware PD_GDMA>;
                        #dma-cells = <1>;
                        interrupts = <0 128 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <128>;
-                       #stream-id-cells = <1>;
                        iommus = <&smmu 0x14ec>;
                        power-domains = <&zynqmp_firmware PD_GDMA>;
                        #dma-cells = <1>;
                        interrupts = <0 129 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <128>;
-                       #stream-id-cells = <1>;
                        iommus = <&smmu 0x14ed>;
                        power-domains = <&zynqmp_firmware PD_GDMA>;
                        #dma-cells = <1>;
                        interrupts = <0 130 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <128>;
-                       #stream-id-cells = <1>;
                        iommus = <&smmu 0x14ee>;
                        power-domains = <&zynqmp_firmware PD_GDMA>;
                        #dma-cells = <1>;
                        interrupts = <0 131 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <128>;
-                       #stream-id-cells = <1>;
                        iommus = <&smmu 0x14ef>;
                        power-domains = <&zynqmp_firmware PD_GDMA>;
                        #dma-cells = <1>;
                        interrupts = <0 77 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <64>;
-                       #stream-id-cells = <1>;
                        iommus = <&smmu 0x868>;
                        power-domains = <&zynqmp_firmware PD_ADMA>;
                        #dma-cells = <1>;
                        interrupts = <0 78 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <64>;
-                       #stream-id-cells = <1>;
                        iommus = <&smmu 0x869>;
                        power-domains = <&zynqmp_firmware PD_ADMA>;
                        #dma-cells = <1>;
                        interrupts = <0 79 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <64>;
-                       #stream-id-cells = <1>;
                        iommus = <&smmu 0x86a>;
                        power-domains = <&zynqmp_firmware PD_ADMA>;
                        #dma-cells = <1>;
                        interrupts = <0 80 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <64>;
-                       #stream-id-cells = <1>;
                        iommus = <&smmu 0x86b>;
                        power-domains = <&zynqmp_firmware PD_ADMA>;
                        #dma-cells = <1>;
                        interrupts = <0 81 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <64>;
-                       #stream-id-cells = <1>;
                        iommus = <&smmu 0x86c>;
                        power-domains = <&zynqmp_firmware PD_ADMA>;
                        #dma-cells = <1>;
                        interrupts = <0 82 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <64>;
-                       #stream-id-cells = <1>;
                        iommus = <&smmu 0x86d>;
                        power-domains = <&zynqmp_firmware PD_ADMA>;
                        #dma-cells = <1>;
                        interrupts = <0 83 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <64>;
-                       #stream-id-cells = <1>;
                        iommus = <&smmu 0x86e>;
                        power-domains = <&zynqmp_firmware PD_ADMA>;
                        #dma-cells = <1>;
                        interrupts = <0 84 4>;
                        clock-names = "clk_main", "clk_apb";
                        xlnx,bus-width = <64>;
-                       #stream-id-cells = <1>;
                        iommus = <&smmu 0x86f>;
                        power-domains = <&zynqmp_firmware PD_ADMA>;
                        #dma-cells = <1>;
                        interrupts = <0 14 4>;
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       #stream-id-cells = <1>;
                        iommus = <&smmu 0x872>;
                        power-domains = <&zynqmp_firmware PD_NAND>;
                };
                        clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       #stream-id-cells = <1>;
                        iommus = <&smmu 0x874>;
                        power-domains = <&zynqmp_firmware PD_ETH_0>;
                        resets = <&zynqmp_reset ZYNQMP_RESET_GEM0>;
                        clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       #stream-id-cells = <1>;
                        iommus = <&smmu 0x875>;
                        power-domains = <&zynqmp_firmware PD_ETH_1>;
                        resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>;
                        clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       #stream-id-cells = <1>;
                        iommus = <&smmu 0x876>;
                        power-domains = <&zynqmp_firmware PD_ETH_2>;
                        resets = <&zynqmp_reset ZYNQMP_RESET_GEM2>;
                        clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       #stream-id-cells = <1>;
                        iommus = <&smmu 0x877>;
                        power-domains = <&zynqmp_firmware PD_ETH_3>;
                        resets = <&zynqmp_reset ZYNQMP_RESET_GEM3>;
                                        <0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
                                        <0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
                                        <0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
-                       #stream-id-cells = <1>;
                        iommus = <&smmu 0x4d0>;
                        power-domains = <&zynqmp_firmware PD_PCIE>;
                        pcie_intc: legacy-interrupt-controller {
                              <0x0 0xc0000000 0x0 0x8000000>;
                        #address-cells = <1>;
                        #size-cells = <0>;
-                       #stream-id-cells = <1>;
                        iommus = <&smmu 0x873>;
                        power-domains = <&zynqmp_firmware PD_QSPI>;
                };
                        interrupts = <0 133 4>;
                        power-domains = <&zynqmp_firmware PD_SATA>;
                        resets = <&zynqmp_reset ZYNQMP_RESET_SATA>;
-                       #stream-id-cells = <4>;
                        iommus = <&smmu 0x4c0>, <&smmu 0x4c1>,
                                 <&smmu 0x4c2>, <&smmu 0x4c3>;
                        /* dma-coherent; */
                        reg = <0x0 0xff160000 0x0 0x1000>;
                        clock-names = "clk_xin", "clk_ahb";
                        xlnx,device_id = <0>;
-                       #stream-id-cells = <1>;
                        iommus = <&smmu 0x870>;
                        #clock-cells = <1>;
                        clock-output-names = "clk_out_sd0", "clk_in_sd0";
                        reg = <0x0 0xff170000 0x0 0x1000>;
                        clock-names = "clk_xin", "clk_ahb";
                        xlnx,device_id = <1>;
-                       #stream-id-cells = <1>;
                        iommus = <&smmu 0x871>;
                        #clock-cells = <1>;
                        clock-output-names = "clk_out_sd1", "clk_in_sd1";
                                interrupt-parent = <&gic>;
                                interrupt-names = "dwc_usb3", "otg", "hiber";
                                interrupts = <0 65 4>, <0 69 4>, <0 75 4>;
-                               #stream-id-cells = <1>;
                                iommus = <&smmu 0x860>;
                                snps,quirk-frame-length-adjustment = <0x20>;
                                snps,refclk_fladj;
                                interrupt-parent = <&gic>;
                                interrupt-names = "dwc_usb3", "otg", "hiber";
                                interrupts = <0 70 4>, <0 74 4>, <0 76 4>;
-                               #stream-id-cells = <1>;
                                iommus = <&smmu 0x861>;
                                snps,quirk-frame-length-adjustment = <0x20>;
                                snps,refclk_fladj;