.xlate = tegra_gpio_xlate,
};
+/*
+ * SPL GPIO functions.
+ */
+int spl_gpio_output(void *regs, uint gpio, int value)
+{
+ /* Configure GPIO output value. */
+ set_level(gpio, value);
+
+ /* Configure GPIO direction as output. */
+ set_direction(gpio, DIRECTION_OUTPUT);
+
+ /* Enable the pin as a GPIO */
+ set_config(gpio, 1);
+
+ return 0;
+}
+
+int spl_gpio_input(void *regs, uint gpio)
+{
+ /* Configure GPIO direction as input. */
+ set_direction(gpio, DIRECTION_INPUT);
+
+ /* Enable the pin as a GPIO */
+ set_config(gpio, 1);
+
+ return 0;
+}
+
+int spl_gpio_get_value(void *regs, uint gpio)
+{
+ struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
+ struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)];
+ int val;
+
+ if (get_direction(gpio) == DIRECTION_INPUT)
+ val = readl(&bank->gpio_in[GPIO_PORT(gpio)]);
+ else
+ val = readl(&bank->gpio_out[GPIO_PORT(gpio)]);
+
+ return (val >> GPIO_BIT(gpio)) & 1;
+}
+
+int spl_gpio_set_value(void *regs, uint gpio, int value)
+{
+ /* Configure GPIO output value. */
+ set_level(gpio, value);
+
+ return 0;
+}
+
/**
* Returns the name of a GPIO port
*
*/
int spl_gpio_input(void *regs, uint gpio);
+/**
+ * spl_gpio_get_value() - Get GPIO value
+ *
+ * @regs: Pointer to GPIO registers
+ * @gpio: GPIO to adjust (SoC-specific)
+ * Return: return GPIO value if OK, -ve on error
+ */
+int spl_gpio_get_value(void *regs, uint gpio);
+
+/**
+ * spl_gpio_set_value() - Set value on GPIO
+ *
+ * @regs: Pointer to GPIO registers
+ * @gpio: GPIO to adjust (SoC-specific)
+ * @value: 0 to set the output low, 1 to set it high
+ * Return: return 0 if OK, -ve on error
+ */
+int spl_gpio_set_value(void *regs, uint gpio, int value);
+
#endif /* __SPL_GPIO_H */