]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
Convert CONFIG_HSMMC2_8BIT to Kconfig
authorTom Rini <trini@konsulko.com>
Fri, 2 Dec 2022 21:42:16 +0000 (16:42 -0500)
committerTom Rini <trini@konsulko.com>
Thu, 22 Dec 2022 15:31:47 +0000 (10:31 -0500)
This converts the following to Kconfig:
   CONFIG_HSMMC2_8BIT

Signed-off-by: Tom Rini <trini@konsulko.com>
18 files changed:
configs/am335x_shc_defconfig
configs/am335x_shc_ict_defconfig
configs/am335x_shc_netboot_defconfig
configs/am335x_shc_sdboot_defconfig
configs/am57xx_evm_defconfig
configs/am57xx_hs_evm_defconfig
configs/am57xx_hs_evm_usb_defconfig
configs/cm_t43_defconfig
configs/dra7xx_evm_defconfig
configs/dra7xx_hs_evm_defconfig
configs/dra7xx_hs_evm_usb_defconfig
configs/omap5_uevm_defconfig
drivers/mmc/Kconfig
include/configs/am335x_shc.h
include/configs/am57xx_evm.h
include/configs/cm_t43.h
include/configs/dra7xx_evm.h
include/configs/omap5_uevm.h

index 9d81f8d0ad7335e4911013ef1094c69763da2653..5a6db3ce6a40e48c324eefcda82b286b7f872e9a 100644 (file)
@@ -72,6 +72,7 @@ CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_SLAVE=0x1
 CONFIG_SYS_I2C_SPEED=400000
 CONFIG_MMC_OMAP_HS=y
+CONFIG_HSMMC2_8BIT=y
 CONFIG_PHY_ADDR_ENABLE=y
 CONFIG_PHY_SMSC=y
 CONFIG_MII=y
index de83139d151575c4eee1a6c029725a7dd6fbb46e..aa55a7a61e5ed2bb3fe5e28a4d10312a9603fb6b 100644 (file)
@@ -70,6 +70,7 @@ CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_SLAVE=0x1
 CONFIG_SYS_I2C_SPEED=400000
 CONFIG_MMC_OMAP_HS=y
+CONFIG_HSMMC2_8BIT=y
 CONFIG_PHY_ADDR_ENABLE=y
 CONFIG_PHY_SMSC=y
 CONFIG_MII=y
index e1dfd6a9bd1213c6f87354852f82c9bc111461f2..cb73b104d23f47dc332004c5494174618071e470 100644 (file)
@@ -73,6 +73,7 @@ CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_SLAVE=0x1
 CONFIG_SYS_I2C_SPEED=400000
 CONFIG_MMC_OMAP_HS=y
+CONFIG_HSMMC2_8BIT=y
 CONFIG_PHY_ADDR_ENABLE=y
 CONFIG_PHY_SMSC=y
 CONFIG_MII=y
index 74f0834466db883cf5348d539bed3f6945f54097..f28e6e6b160c5ea66c6c125cc36ef1790a31befd 100644 (file)
@@ -72,6 +72,7 @@ CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_SLAVE=0x1
 CONFIG_SYS_I2C_SPEED=400000
 CONFIG_MMC_OMAP_HS=y
+CONFIG_HSMMC2_8BIT=y
 CONFIG_PHY_ADDR_ENABLE=y
 CONFIG_PHY_SMSC=y
 CONFIG_MII=y
index 054e9747a8b218afed44be5369e6e9011ac4ba34..03f799506e15c99d6b53a6c4aded91dd6db432d6 100644 (file)
@@ -92,6 +92,7 @@ CONFIG_MISC=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x50
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_HSMMC2_8BIT=y
 CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=76800000
index 02a2543a3f0724f777d7afdb65eeaf24789f3c90..86bcfe85ae36d7eeb79b91788403a6e6c8c4a397 100644 (file)
@@ -89,6 +89,7 @@ CONFIG_MISC=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x50
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_HSMMC2_8BIT=y
 CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=76800000
index 84eca42aac05de0f62d27c476cf5422a34b1b5fd..eedbfd0d865f881efa1dd98c24e23dec9d44b891 100644 (file)
@@ -88,6 +88,7 @@ CONFIG_MISC=y
 CONFIG_SYS_I2C_EEPROM_ADDR=0x50
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_HSMMC2_8BIT=y
 CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=76800000
index 867ca30320587b6b5ff0d63d8749faaa6c8c6335..6eda33ebbc0f83ed6faf5381006e8309bce08e32 100644 (file)
@@ -76,6 +76,7 @@ CONFIG_SYS_RX_ETH_BUFFER=64
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_HSMMC2_8BIT=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y
index d91cf3e13018421c53398e7cd3bb8bcf827bd5a4..41df92f3d287790ca6e720cd48664dcd990ce1d0 100644 (file)
@@ -101,6 +101,7 @@ CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS200_SUPPORT=y
 CONFIG_SPL_MMC_HS200_SUPPORT=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_HSMMC2_8BIT=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
index 195bc0e4ee0f17771bcca73232b87bf24ff62f21..7392b73085334a857ae963e7b29932ea3fbeeafa 100644 (file)
@@ -96,6 +96,7 @@ CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS200_SUPPORT=y
 CONFIG_SPL_MMC_HS200_SUPPORT=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_HSMMC2_8BIT=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_SYS_NAND_ONFI_DETECTION=y
index 99cdbbc02f89e323e40f97d0a096bacb7e38b477..1bda6db7a36bb4630c98bab1428a83bb478da7e4 100644 (file)
@@ -92,6 +92,7 @@ CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS200_SUPPORT=y
 CONFIG_SPL_MMC_HS200_SUPPORT=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_HSMMC2_8BIT=y
 CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=76800000
index 91878c11ed40d61ba8b49504a46d142cc6d021b3..9d5c515a44c1cc1fbc4b50b930f0f83dfe8fcc19 100644 (file)
@@ -52,6 +52,7 @@ CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SPL_SYS_I2C_LEGACY=y
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_HSMMC2_8BIT=y
 CONFIG_PALMAS_POWER=y
 CONFIG_SCSI=y
 CONFIG_SCSI_AHCI_PLAT=y
index bf4d994ff695533e60fcfc6debe9a24b23c7b8b8..698c91c57f4fd54649b0c6302286a9c96525a408 100644 (file)
@@ -385,6 +385,11 @@ config MMC_OMAP36XX_PINS
 
          If unsure, say N.
 
+config HSMMC2_8BIT
+       bool "Enable 8-bit interface for eMMC (interface #2)"
+       depends on MMC_OMAP_HS && (OMAP44XX || OMAP54XX || DRA7XX || AM33XX || \
+               AM43XX || ARCH_KEYSTONE)
+
 config SH_SDHI
        bool "SuperH/Renesas ARM SoCs on-chip SDHI host controller support"
        depends on ARCH_RMOBILE
index 452887d6995cada6f85db93a043e180127b2f87c..70645edcb140814a9f64273ec6be5502375842fd 100644 (file)
@@ -20,8 +20,6 @@
 #define V_OSCK                         24000000  /* Clock output from T2 */
 #define V_SCLK                         (V_OSCK)
 
-#define CONFIG_HSMMC2_8BIT
-
 #ifndef CONFIG_SPL_BUILD
 #define CONFIG_EXTRA_ENV_SETTINGS \
        "loadaddr=0x80200000\0" \
index dacfd41ccedf12783caf76254e173dce235e2643..ba91f2b0545b51766aa90acf8b5e44dd44b39e6c 100644 (file)
@@ -35,9 +35,6 @@
 
 #include <configs/ti_omap5_common.h>
 
-/* Enhance our eMMC support / experience. */
-#define CONFIG_HSMMC2_8BIT
-
 /* CPSW Ethernet */
 #define PHY_ANEG_TIMEOUT       8000    /* PHY needs longer aneg time at 1G */
 
index fcc17fc6b7ce044000525b876dba2bdc496695aa..8a18d6f97ab58faf70c6f0fbfdc1f72fcd4f1935 100644 (file)
@@ -36,8 +36,6 @@
  * we don't need to do it twice.
  */
 
-#define CONFIG_HSMMC2_8BIT
-
 #include <configs/ti_armv7_omap.h>
 
 #define V_OSCK                         24000000  /* Clock output from T2 */
index ac3fcacc68ed4d3ba15e8f44261bc89cb946c046..b8f518612ee3d78a95ba487c1c3965cdad9465eb 100644 (file)
@@ -48,9 +48,6 @@
 
 #include <configs/ti_omap5_common.h>
 
-/* Enhance our eMMC support / experience. */
-#define CONFIG_HSMMC2_8BIT
-
 /*
  * Default to using SPI for environment, etc.
  * 0x000000 - 0x040000 : QSPI.SPL (256KiB)
index d7fa2d43914acffc823328c663fb13daf714eadd..39d0b403139afb0d1a9b0bc7b30912da6f800973 100644 (file)
@@ -32,9 +32,6 @@
 
 /* MMC ENV related defines */
 
-/* Enhance our eMMC support / experience. */
-#define CONFIG_HSMMC2_8BIT
-
 /* Required support for the TCA642X GPIO we have on the uEVM */
 #define CFG_SYS_I2C_TCA642X_BUS_NUM 4
 #define CFG_SYS_I2C_TCA642X_ADDR 0x22