void *base;
struct dwc3 dwc3;
struct phy_bulk phys;
- struct gpio_desc ulpi_reset;
+ struct gpio_desc *ulpi_reset;
};
struct dwc3_generic_host_priv {
if (CONFIG_IS_ENABLED(DM_GPIO) &&
device_is_compatible(dev->parent, "xlnx,zynqmp-dwc3")) {
- rc = gpio_request_by_name(dev->parent, "reset-gpios", 0,
- &priv->ulpi_reset, GPIOD_ACTIVE_LOW);
- if (rc)
- return rc;
-
- /* Toggle ulpi to reset the phy. */
- rc = dm_gpio_set_value(&priv->ulpi_reset, 1);
- if (rc)
- return rc;
-
- mdelay(5);
-
- rc = dm_gpio_set_value(&priv->ulpi_reset, 0);
- if (rc)
- return rc;
-
- mdelay(5);
+ priv->ulpi_reset = devm_gpiod_get_optional(dev->parent, "reset",
+ GPIOD_ACTIVE_LOW);
+ /* property is optional, don't return error! */
+ if (priv->ulpi_reset) {
+ /* Toggle ulpi to reset the phy. */
+ rc = dm_gpio_set_value(priv->ulpi_reset, 1);
+ if (rc)
+ return rc;
+
+ mdelay(5);
+
+ rc = dm_gpio_set_value(priv->ulpi_reset, 0);
+ if (rc)
+ return rc;
+
+ mdelay(5);
+ }
}
if (device_is_compatible(dev->parent, "rockchip,rk3399-dwc3"))
if (CONFIG_IS_ENABLED(DM_GPIO) &&
device_is_compatible(dev->parent, "xlnx,zynqmp-dwc3")) {
- struct gpio_desc *ulpi_reset = &priv->ulpi_reset;
+ struct gpio_desc *ulpi_reset = priv->ulpi_reset;
dm_gpio_free(ulpi_reset->dev, ulpi_reset);
}