riscv: Modify generic codes to support RISC-V

Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

diff --git a/arch/Kconfig b/arch/Kconfig
index 0b12ed986c6409941c9328426cd94f22e9ca4708..762230cd5644362a7a4ce395e13d3323396cf60e 100644 (file)
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -54,6 +54,10 @@ config PPC
        select HAVE_PRIVATE_LIBGCC
        select SUPPORT_OF_CONTROL
 
+config RISCV
+       bool "riscv architecture"
+       select SUPPORT_OF_CONTROL
+
 config SANDBOX
        bool "Sandbox"
        select BOARD_LATE_INIT
@@ -194,3 +198,4 @@ source "arch/sandbox/Kconfig"
 source "arch/sh/Kconfig"
 source "arch/x86/Kconfig"
 source "arch/xtensa/Kconfig"
+source "arch/riscv/Kconfig"

diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index 27ffcd55bcec3a3f0ae2c01fb6bddbd7ea5c5d52..c7ebad17d1751a831915ad88fb736229bc4164ae 100644 (file)
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
@@ -417,6 +417,21 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
        return 0;
 }
 
+#elif defined(CONFIG_RISCV)
+
+int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+       bd_t *bd = gd->bd;
+
+       print_num("arch_number", bd->bi_arch_number);
+       print_bi_boot_params(bd);
+       print_bi_dram(bd);
+       print_eth_ip_addr();
+       print_baudrate();
+
+       return 0;
+}
+
 #elif defined(CONFIG_ARC)
 
 int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])

diff --git a/common/board_f.c b/common/board_f.c
index e46eceda7d0f24ee8261eec2febde7e4c2d65b96..0bdce64ca583731c3ede6dc6c45ee75ebab4e0f7 100644 (file)
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -218,7 +218,7 @@ static int setup_mon_len(void)
        gd->mon_len = (ulong)&_end - (ulong)_init;
 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
        gd->mon_len = CONFIG_SYS_MONITOR_LEN;
-#elif defined(CONFIG_NDS32) || defined(CONFIG_SH)
+#elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
        gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
 #elif defined(CONFIG_SYS_MONITOR_BASE)
        /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */

diff --git a/common/board_r.c b/common/board_r.c
index 09167c13cc88c987bb122c2212313f82d0c9245e..2a9df6b716bf151079fd80bab3c463a44e971fb7 100644 (file)
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -126,7 +126,7 @@ static int initr_reloc_global_data(void)
 {
 #ifdef __ARM__
        monitor_flash_len = _end - __image_copy_start;
-#elif defined(CONFIG_NDS32)
+#elif defined(CONFIG_NDS32) || defined(CONFIG_RISCV)
        monitor_flash_len = (ulong)&_end - (ulong)&_start;
 #elif !defined(CONFIG_SANDBOX) && !defined(CONFIG_NIOS2)
        monitor_flash_len = (ulong)&__init_end - gd->relocaddr;
@@ -704,7 +704,7 @@ static init_fnc_t init_sequence_r[] = {
 #ifdef CONFIG_DM
        initr_dm,
 #endif
-#if defined(CONFIG_ARM) || defined(CONFIG_NDS32)
+#if defined(CONFIG_ARM) || defined(CONFIG_NDS32) || defined(CONFIG_RISCV)
        board_init,     /* Setup chipselects */
 #endif
        /*

diff --git a/include/elf.h b/include/elf.h
index aaecac799ef296717119e63556289f486b602a53..fe2128f3788e430d625ea5707c635d3b73e6c12b 100644 (file)
--- a/include/elf.h
+++ b/include/elf.h
@@ -613,6 +613,11 @@ unsigned long elf_hash(const unsigned char *name);
 #define R_AARCH64_NONE         0       /* No relocation.  */
 #define R_AARCH64_RELATIVE     1027    /* Adjust by program base.  */
 
+/* RISC-V relocations */
+#define R_RISCV_32             1
+#define R_RISCV_64             2
+#define R_RISCV_RELATIVE       3
+
 #ifndef __ASSEMBLER__
 int valid_elf_image(unsigned long addr);
 #endif

diff --git a/include/image.h b/include/image.h
index a128a623e51bc0c0a229385804042e1248c20abb..a41a8369c65432ec73c40f3c4aa0033979616f98 100644 (file)
--- a/include/image.h
+++ b/include/image.h
@@ -190,6 +190,7 @@ enum {
        IH_ARCH_ARC,                    /* Synopsys DesignWare ARC */
        IH_ARCH_X86_64,                 /* AMD x86_64, Intel and Via */
        IH_ARCH_XTENSA,                 /* Xtensa       */
+       IH_ARCH_RISCV,                  /* RISC-V */
 
        IH_ARCH_COUNT,
 };