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mmc: zynq_sdhci: Fix timing macros for MMC High speed
authorAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Mon, 27 Jun 2022 08:52:45 +0000 (14:22 +0530)
committerMichal Simek <michal.simek@amd.com>
Tue, 26 Jul 2022 06:23:54 +0000 (08:23 +0200)
commit71f07731488e9ade674ee396208317ab2db3cce1
treeabf1f1faf624e9dbd4bf61466330d0556276626dtree | snapshot
parent156cb2af92c244fae15c8fbdab293d88d451edcfcommit | diff
mmc: zynq_sdhci: Fix timing macros for MMC High speed

Timing macro's are wrong for MMC_HS_52 and MMC_DDR_52. Fix it with
correct values of MMC_TIMING_MMC_HS and MMC_TIMING_MMC_DDR52 respectively.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Link: https://lore.kernel.org/r/1656319965-12124-1-git-send-email-ashok.reddy.soma@xilinx.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
drivers/mmc/zynq_sdhci.c diff | blob | history
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