From eb6d2e5920fa518fc924025e1e7987cd0dde73ad Mon Sep 17 00:00:00 2001 From: Ye Li <ye.li@nxp.com> Date: Mon, 22 Jul 2019 01:25:00 +0000 Subject: [PATCH] i.MX7ULP: Fix SPLL/APLL clock rate calculation issue The num/denom is a float value, but in the calculation it is convert to integer 0, and cause the result wrong. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> --- arch/arm/mach-imx/mx7ulp/scg.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-imx/mx7ulp/scg.c b/arch/arm/mach-imx/mx7ulp/scg.c index 85d726fe30..a28a2bc81b 100644 --- a/arch/arm/mach-imx/mx7ulp/scg.c +++ b/arch/arm/mach-imx/mx7ulp/scg.c @@ -503,7 +503,10 @@ u32 decode_pll(enum pll_clocks pll) infreq = infreq / pre_div; - return infreq * mult + infreq * num / denom; + if (denom) + return infreq * mult + infreq * num / denom; + else + return infreq * mult; case PLL_A7_APLL: reg = readl(&scg1_regs->apllcsr); @@ -532,7 +535,10 @@ u32 decode_pll(enum pll_clocks pll) infreq = infreq / pre_div; - return infreq * mult + infreq * num / denom; + if (denom) + return infreq * mult + infreq * num / denom; + else + return infreq * mult; case PLL_USB: reg = readl(&scg1_regs->upllcsr); -- 2.39.5