From 16e78f2a649abd6b202ec40a44879bf3fac34d10 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Uwe=20Kleine-K=C3=B6nig?= <ukleinek@debian.org> Date: Mon, 28 Oct 2024 20:00:31 +0100 Subject: [PATCH] arm64: dts: rockchip: Simplify network PHY connection on qnap-ts433 MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit While it requires to have the right phy driver loaded (i.e. motorcomm) to make the phy asserting the right delays, this is generally the preferred way to define the MAC <-> PHY connection. Signed-off-by: Uwe Kleine-König <ukleinek@debian.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20240304084612.711678-2-ukleinek@debian.org Signed-off-by: Heiko Stuebner <heiko@sntech.de> [ upstream commit: e8d45544f806f3b55c30345de84262cbb9504902 ] (cherry picked from commit e0bbe061fd537bd7b113c53eb046bbcbf0e6597d) Reviewed-by: Kever Yang <kever.yang@rock-chips.com> --- dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts index 6c4269b3d9..20e4fa6c18 100644 --- a/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts +++ b/dts/upstream/src/arm64/rockchip/rk3568-qnap-ts433.dts @@ -198,15 +198,13 @@ assigned-clock-rates = <0>, <125000000>; clock_in_out = "output"; phy-handle = <&rgmii_phy0>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; pinctrl-names = "default"; pinctrl-0 = <&gmac0_miim &gmac0_tx_bus2 &gmac0_rx_bus2 &gmac0_rgmii_clk &gmac0_rgmii_bus>; - rx_delay = <0x2f>; - tx_delay = <0x3c>; status = "okay"; }; -- 2.39.5