From: Hongtao Jia <B38951@freescale.com>
Date: Thu, 20 Dec 2012 19:36:12 +0000 (+0000)
Subject: powerpc/mpc8572ds: Enable bank interleaving to cs0+cs1 for dual-rank DIMMs
X-Git-Tag: v2025.01-rc5-pxa1908~16587
X-Git-Url: http://git.dujemihanovic.xyz/%22/icons/right.gif/static/git-logo.png?a=commitdiff_plain;h=238e14679157c972ccc4de909bfac83f46d0748d;p=u-boot.git

powerpc/mpc8572ds: Enable bank interleaving to cs0+cs1 for dual-rank DIMMs

The controller interleaving only takes the usable memory mapped to cs0. In
the case of bank interleaving not enabled, only half of dual-rank DIMM will
be used.

For single-rank DIMM bank interleaving will be auto disabled.

Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
---

diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index a62b7d53a9..d233365b7d 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -735,7 +735,7 @@
 #define CONFIG_BAUDRATE	115200
 
 #define	CONFIG_EXTRA_ENV_SETTINGS				\
-"hwconfig=fsl_ddr:ctlr_intlv=bank,ecc=off\0"			\
+"hwconfig=fsl_ddr:ctlr_intlv=bank,bank_intlv=cs0_cs1,ecc=off\0"		\
 "netdev=eth0\0"						\
 "uboot=" __stringify(CONFIG_UBOOTPATH) "\0"				\
 "tftpflash=tftpboot $loadaddr $uboot; "			\