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wdt: designware: fix timeout calculation due to expecting KHz
author
Jack Mitchell
<ml@embed.me.uk>
Thu, 17 Sep 2020 09:30:40 +0000
(10:30 +0100)
committer
Tom Rini
<trini@konsulko.com>
Thu, 8 Oct 2020 15:42:36 +0000
(11:42 -0400)
The timeout calculation is based on the clk being in KHz but
the clk api returns the clk value in Hz. Convert this to KHz
to calculate the correct timeout value.
Signed-off-by: Jack Mitchell <ml@embed.me.uk>
drivers/watchdog/designware_wdt.c
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diff --git
a/drivers/watchdog/designware_wdt.c
b/drivers/watchdog/designware_wdt.c
index 12f09a7a3920694e6709afb5fbd58aaf8badc503..7caa6c550cddc655bc220fd7f18662651b4bb2f8 100644
(file)
--- a/
drivers/watchdog/designware_wdt.c
+++ b/
drivers/watchdog/designware_wdt.c
@@
-130,7
+130,7
@@
static int designware_wdt_probe(struct udevice *dev)
if (ret)
return ret;
- priv->clk_khz = clk_get_rate(&clk);
+ priv->clk_khz = clk_get_rate(&clk)
/ 1000
;
if (!priv->clk_khz)
return -EINVAL;
#else