From df0996907018cef836e17a076422fd22daa435e0 Mon Sep 17 00:00:00 2001
From: Michal Simek <michal.simek@xilinx.com>
Date: Fri, 20 Jul 2018 10:17:17 +0200
Subject: [PATCH] arm: zynq: Fix indentation for zynq-cse targets

Trivial DT style fixes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
 arch/arm/dts/zynq-cse-nand.dts | 3 +--
 arch/arm/dts/zynq-cse-nor.dts  | 1 -
 2 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/arm/dts/zynq-cse-nand.dts b/arch/arm/dts/zynq-cse-nand.dts
index 9b1dd19a85..1e16d7fab9 100644
--- a/arch/arm/dts/zynq-cse-nand.dts
+++ b/arch/arm/dts/zynq-cse-nand.dts
@@ -38,7 +38,7 @@
 		#size-cells = <1>;
 		ranges;
 
-			slcr: slcr@f8000000 {
+		slcr: slcr@f8000000 {
 			u-boot,dm-pre-reloc;
 			#address-cells = <1>;
 			#size-cells = <1>;
@@ -72,7 +72,6 @@
 			};
 		};
 	};
-
 };
 
 &dcc {
diff --git a/arch/arm/dts/zynq-cse-nor.dts b/arch/arm/dts/zynq-cse-nor.dts
index edc8f59f6c..9710abadcf 100644
--- a/arch/arm/dts/zynq-cse-nor.dts
+++ b/arch/arm/dts/zynq-cse-nor.dts
@@ -79,7 +79,6 @@
 			};
 		};
 	};
-
 };
 
 &dcc {
-- 
2.39.5