From: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Date: Thu, 25 Feb 2016 07:21:50 +0000 (+0530)
Subject: mmc: sdhci: Disable internal clock enable bit
X-Git-Tag: v2025.01-rc5-pxa1908~8960^2~13
X-Git-Url: http://git.dujemihanovic.xyz/%22/icons/right.gif/static/%7B%7B%20%24image.RelPermalink%20%7D%7D?a=commitdiff_plain;h=1d405e207bb176c937d44f9a5f87e268022c2416;p=u-boot.git

mmc: sdhci: Disable internal clock enable bit

Disable internal clock by clearing the internal
clock enable bit. This bit needs to be cleared too
when we stop the SDCLK for changing the frequency
divisor. This bit should be set to zero when the
device is not using the Host controller.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index de8d8ea70c..9fdbed8aa9 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -313,7 +313,7 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock)
 	}
 
 	reg = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
-	reg &= ~SDHCI_CLOCK_CARD_EN;
+	reg &= ~(SDHCI_CLOCK_CARD_EN | SDHCI_CLOCK_INT_EN);
 	sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL);
 
 	if (clock == 0)